Bart Kienhuis

发表

MatParser: An array dataflow analysis compiler

Bart Kienhuis, 2000 .

Laura: Leiden Architecture Research and Exploration Tool

Ed F. Deprettere, Bart Kienhuis, Todor Stefanov, 2003, FPL.

Algorithmic transformation techniques for efficient exploration of alternative application instances

Ed F. Deprettere, Bart Kienhuis, Todor Stefanov, 2002, Proceedings of the Tenth International Symposium on Hardware/Software Codesign. CODES 2002 (IEEE Cat. No.02TH8627).

Compilation from Matlab to process networks realised in FPGA

Ed F. Deprettere, Bart Kienhuis, T. Harriss, 2001 .

A Process Splitting Transformation For Kahn Process Networks

Alexandru Turjan, Erwin A. de Kock, Bart Kienhuis, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Translating Imperative Affine Nested Loop Programs into Process Networks

Ed F. Deprettere, Bart Kienhuis, Edwin Rijpkema, 2002, Embedded Processor Design Challenges.

Programming Multicores with Kahn Process Networks; a Smart Choice?

Bart Kienhuis, 2008, 2008 6th ACM/IEEE International Conference on Formal Methods and Models for Co-Design.

A High-Level Simulator for the Performance Analysis of Dataflow Implementations of Jacobi algorithms

Bart Kienhuis, Daniel Van Loenen, 1997 .

A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach

Ed F. Deprettere, Bart Kienhuis, Pieter van der Wolf, 2001, Embedded Processor Design Challenges.

HEAP: A Highly Efficient Adaptive Multi-processor Framework

Luciano Lavagno, Florian Schäfer, Bart Kienhuis, 2012, DSD.

Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation

Ed F. Deprettere, Bart Kienhuis, Shuvra S. Bhattacharyya, 2007, IEEE Transactions on Signal Processing.

High level modeling for parallel executions of nested loop algorithms

Ed F. Deprettere, Bart Kienhuis, Paul Lieverse, 2000, Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors.

Deriving Process Networks from Nested Loop Algorithms

Ed F. Deprettere, Bart Kienhuis, Edwin Rijpkema, 2000, Parallel Process. Lett..

DERIVING A MULTI-LEVEL PROGRAM MODEL FOR EFFICIENT PARALLELIZATION ON HETEROGENEOUS PLATFORMS

Bart Kienhuis, Niels Bohrweg, Ana Balevic, 2013 .

High level synthesis for FPGAs applied to a sphere decoder channel preprocessor (abstract only)

Bart Kienhuis, Stephen Neuendorffer, Kees A. Vissers, 2011, FPGA '11.

Deriving efficient control in Process Networks with Compaan/Laura

Alexandru Turjan, Ed F. Deprettere, Bart Kienhuis, 2008, Int. J. Embed. Syst..

An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures

Ed F. Deprettere, Bart Kienhuis, Pieter van der Wolf, 1997, ASAP.

Compilation from Matlab to Process Networks

Ed F. Deprettere, Bart Kienhuis, Edwin Rypkema, 1999 .

Automatic partitioning and mapping of stream-based applications onto the Intel IXP Network processor

Bart Kienhuis, Sjoerd Meijer, Johan Walters, 2007, SCOPES '07.

Scaling Data-Intensive Applications on Heterogeneous Platforms with Accelerators

Bart Kienhuis, Ana Balevic, 2012, 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum.

System design using Khan process networks: the Compaan/Laura approach

Alexandru Turjan, Ed F. Deprettere, Bart Kienhuis, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

DERIVING PROCESS NETWORKS FROM NESTED LOOP ALGORITHMS

Ed F. Deprettere, Bart Kienhuis, Edwin Rijpkema, 2000 .

Heterogeneous Concurrent Modeling and Design in Java (Volume 2: Ptolemy II Software Architecture)

Edward A. Lee, Bart Kienhuis, Shuvra S. Bhattacharyya, 2008 .

Heterogeneous Concurrent Modeling and Design in Java (Volume 1: Introduction to Ptolemy II)

Edward A. Lee, Bart Kienhuis, Shuvra S. Bhattacharyya, 2008 .

Translating affine nested-loop programs to process networks

Alexandru Turjan, Ed F. Deprettere, Bart Kienhuis, 2004, CASES '04.

A Clustering Approach to Explore Grain-Sizes in the Definition of Processing Elements in Dataflow Architectures

Ed F. Deprettere, Erwin A. de Kock, Bart Kienhuis, 1999, J. VLSI Signal Process..

Exploring Application Model Instances in System-Level Design

Bart Kienhuis, Todor Stefanov, Ed F. Deprettere, 2001 .

Automated synthesis of streaming C applications to process networks in hardware

Bart Kienhuis, Sven van Haastregt, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

Realizations of the Extended Linearization Model

Alexandru Turjan, Ed F. Deprettere, Bart Kienhuis, 2002 .

FIFO Exploration in Mapping Streaming Applications onto the TI OMAP3530 Platform: Case Study and Optimizations

Rainer Leupers, Gerd Ascheid, Bart Kienhuis, 2012, 2012 IEEE 6th International Symposium on Embedded Multicore SoCs.

Hierarchical run time deadlock detection in process networks

Bin Jiang, Ed F. Deprettere, Bart Kienhuis, 2008, 2008 IEEE Workshop on Signal Processing Systems.

Heterogeneous Concurrent Modeling and Design in Java (Volume 3: Ptolemy II Domains)

Edward A. Lee, Bart Kienhuis, Shuvra S. Bhattacharyya, 2008 .

A Compile Time Based Approach for Solving Out-of-Order Communication in Kahn Process Networks

Alexandru Turjan, Ed F. Deprettere, Bart Kienhuis, 2002, ASAP.

Parametrized system level design: Real-time X-Ray image processing case study

Bart Kienhuis, Todor Stefanov, Tsvetan Shoshkov, 2016, 2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Cool MPSoC programming

Rainer Leupers, Lothar Thiele, Bart Kienhuis, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Architectures and design techniques for energy efficient embedded DSP and multimedia processing

Bart Kienhuis, Patrick Schaumont, Ingrid Verbauwhede, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Determining Performance Boundaries on High-Level System Specifications

Bart Kienhuis, René van Leuken, Carlo Galuzzi, 2016, SCOPES.

Classifying interprocess communication in process network representation of nested-loop programs

Alexandru Turjan, Ed F. Deprettere, Bart Kienhuis, 2007, TECS.

Communication synthesis in a multiprocessor environment

Ed F. Deprettere, Bart Kienhuis, Claudiu Zissulescu, 2005, International Conference on Field Programmable Logic and Applications, 2005..

Compilation From Matlab to Process Networks Realized in FPGA

Ed F. Deprettere, Bart Kienhuis, Richard L. Walke, 2001, Conference Record of Thirty-Fifth Asilomar Conference on Signals, Systems and Computers (Cat.No.01CH37256).

An Integer Linear Programming Approach to Classify the Communication in Process Networks

Alexandru Turjan, Ed F. Deprettere, Bart Kienhuis, 2004, SCOPES.

Design space exploration of stream-based dataflow architectures: methods and tools

Bart Kienhuis, B. Kienhuis, 1999 .

Hardware Implementation of the First Stage of the Blast Algorithms

Ed F. Deprettere, Bart Kienhuis, Herman P. Spaink, 2003 .

Enabling Automatic Pipeline Utilization Improvement in Polyhedral Process Network Implementations

Bart Kienhuis, Sven van Haastregt, 2012, 2012 IEEE 23rd International Conference on Application-Specific Systems, Architectures and Processors.

Modeling Stream-Based Applications Using the SBF Model of Computation

Ed F. Deprettere, Bart Kienhuis, B. Kienhuis, 2001, J. VLSI Signal Process..

Preface

Bart Kienhuis, Richard L. Walke, Ed F. Deprettere, 2002, Des. Autom. Embed. Syst..

KPN2GPU: an approach for discovery and exploitation of fine-grain data parallelism in process networks

Bart Kienhuis, Ana Balevic, 2011, CARN.

Expression synthesis in process networks generated by LAURA

Ed F. Deprettere, Bart Kienhuis, Claudiu Zissulescu, 2005, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05).

Storage Management in Process Networks using the Lexicographically Maximal Preimage

Alexandru Turjan, Bart Kienhuis, 2003, ASAP.

The construction of a retargetable simulator for an architecture template

Ed F. Deprettere, Bart Kienhuis, Pieter van der Wolf, 1998, CODES.

A data parallel view on polyhedral process networks

Bart Kienhuis, Ana Balevic, 2011, SCOPES.

Solving Out-of-Order Communication in Kahn Process Networks

Alexandru Turjan, Ed F. Deprettere, Bart Kienhuis, 2002, J. VLSI Signal Process..

Compaan: deriving process networks from Matlab for embedded signal processing architectures

Ed F. Deprettere, Bart Kienhuis, Edwin Rijpkema, 2000, CODES '00.

Interactive presentation: A process splitting transformation for Kahn process networks

Bart Kienhuis, Sjoerd Meijer, A. Turjan, 2007 .

HEAP: A Highly Efficient Adaptive Multi-processor Framework

Luciano Lavagno, Florian Schäfer, Bart Kienhuis, 2012, 2012 15th Euromicro Conference on Digital System Design.

IP-XACT extensions for Reconfigurable Computing

Bart Kienhuis, Vlad Mihai Sima, Todor Stefanov, 2011, ASAP 2011 - 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors.

Increasing Pipelined IP Core Utilization in Process Networks Using Exploration

Ed F. Deprettere, Bart Kienhuis, Claudiu Zissulescu, 2004, FPL.

A hierarchical classification scheme to derive interprocess communication in process networks

Alexandru Turjan, Ed F. Deprettere, Bart Kienhuis, 2004, Proceedings. 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors, 2004..

A hierarchical classification scheme to derive interprocess communication in process networks

Alexandru Turjan, Ed F. Deprettere, Bart Kienhuis, 2004 .

Cost modeling and cycle-accurate co-simulation of heterogeneous multiprocessor systems

Bart Kienhuis, Sven van Haastregt, Eyal Halm, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

OVERVIEW OF THE PTOLEMY PROJECT JULY 6 , 1999

Edward A. Lee, Bart Kienhuis, Mudit Goel, 1999 .

Solving Out of Order communication using CAM memory ; an implementation

Alexandru Turjan, Bart Kienhuis, Claudiu Zissulescu-Ianculescu, 2002 .

Mapping KPN Models of Streaming Applications on A Network-on-Chip Platform

Bart Kienhuis, Kees Goossens, Ashkan Beyranvand Nejad, 2009 .