Ernst G. Bernard

Fault location in multistage interconnection networks with global and distributed control

Josef A. Nossek, Matthias Sauer, Ernst G. Bernard, 1994, Proceedings of 8th International Parallel Processing Symposium.

Sorting on defective VLSI-arrays

Josef A. Nossek, Matthias Sauer, Josef G. Krammer, 1991, Integr..

A new retiming algorithm for circuit design

Josef A. Nossek, Sven Simon, Matthias Sauer, 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

Block sequential CORDIC architectures

Josef A. Nossek, Matthias Sauer, Ernst G. Bernard, 1993, 1993 IEEE International Symposium on Circuits and Systems.

Efficient Fault Locations for Globally Controlled and Comparison-Based Multistage Interconnection Networks

Ernst G. Bernard, E. Bernard, 1996, IEEE Trans. Computers.

Built-in self test architectures for multistage interconnection networks

Josef A. Nossek, Sven Simon, Ernst G. Bernard, 1996, Proceedings ED&TC European Design and Test Conference.