Paul Bougas

Pipelined array-based FIR filter folding

Paraskevas Kalivas, Kiamal Z. Pekmestzi, Paul Bougas, 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

Pipeline array implementation of FIR filters

Paraskevas Kalivas, Kiamal Z. Pekmestzi, Paul Bougas, 2004, 2004 12th European Signal Processing Conference.

Segmentation based design of serial parallel multipliers

Kiamal Z. Pekmestzi, Kostas Anagnostopoulos, Isidoros Sideris, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Low-latency and high-efficiency bit serial-serial multipliers

Paraskevas Kalivas, Kiamal Z. Pekmestzi, Paul Bougas, 2004, 2004 12th European Signal Processing Conference.

POSITION SENSORS BASED ON THE DELAY LINE PRINCIPLE

Kiamal Pekmestzi, Paul Bougas, A. Tsirikos, 2001 .

100% operational efficient bit-serial programmable FIR digital filters

Paraskevas Kalivas, Kiamal Z. Pekmestzi, Paul Bougas, 2005, 2005 13th European Signal Processing Conference.

High-Speed Pipeline Implementation of Radix-2 DIF Algorithm

George Economakos, Kiamal Pekmestzi, Paul Bougas, 2007 .

New Systolic And Low Latency Parallel FIR Filter Schemes

Paraskevas Kalivas, Kiamal Z. Pekmestzi, George Economakos, .