Sotirios G. Ziavras

发表

Asymmetrically banked value-aware register files for low-energy and high-performance

Shuai Wang, Hongyan Yang, Jie S. Hu, 2008, Microprocess. Microsystems.

Facilitating High-Performance Image Analysis on Reduced Hypercube (RH) Parallel Computers

Sotirios G. Ziavras, Michalis A. Sideras, 1995, Int. J. Pattern Recognit. Artif. Intell..

ASIC Design of Shared Vector Accelerators for Multicore Processors

Sotirios G. Ziavras, Spiridon F. Beldianu, 2014, 2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing.

Techniques for Mapping Deterministic Algorithms onto Multi-Level Systems

Sotirios G. Ziavras, 1990, ICPP.

Robust interprocessor connections for very-high performance

Qian Wang, Sotirios G. Ziavras, Q. Wang, 1998, Robust Communication Networks: Interconnection and Survivability.

FPGA and ASIC square root designs for high performance and power efficiency

Sotirios G. Ziavras, Spiridon F. Beldianu, Shashank Suresh, 2013, 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors.

A new-generation parallel computer and its performance evaluation

Anthony T. Chronopoulos, Sotirios G. Ziavras, Haim Grebel, 2000, Future Gener. Comput. Syst..

TRB: Tag Replication Buffer for Enhancing the Reliability of the Cache Tag Array

Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

High-performance emulation of hierarchical structures on hypercube supercomputers

Sotirios G. Ziavras, Devenkumar P. Shah, 1994, Concurr. Pract. Exp..

Modular vector processor architecture targeting at data-level parallelism

Sotirios G. Ziavras, Seyed A. Rooholamin, 2015, Microprocess. Microsystems.

Novel FPGA-Based Signature Matching for Deep Packet Inspection

Sotirios G. Ziavras, Nitesh B. Guinde, 2010, WISTP.

Versatile design of shared vector coprocessors for multicores

Sotirios G. Ziavras, Spiridon F. Beldianu, Christopher Dahlberg, 2012, Microprocess. Microsystems.

Power-Performance Optimization of a Virtualized SMT Vector Processor via Thread Fusion and Lane Configuration

Yaojie Lu, Sotirios G. Ziavras, Seyed Amin Rooholamin, 2016, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Viable Architectures for High-Performance Computing

Qian Wang, Sotirios G. Ziavras, Paraskevi Papathanasiou, 2003, Comput. J..

Parallel LU factorization of sparse matrices on FPGA‐based configurable computing engines

Sotirios G. Ziavras, Xiaofang Wang, Xiaofang Wang, 2004, Concurr. Comput. Pract. Exp..

Performance-Energy Optimizations for Shared Vector Accelerators in Multicores

Sotirios G. Ziavras, Spiridon F. Beldianu, 2015, IEEE Transactions on Computers.

H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication

Sotirios G. Ziavras, Xizhen Xu, 2005, ICCD.

Evaluating the communications capabilities of the generalized hypercube interconnection network

Sotirios G. Ziavras, Sanjay Krishnamurthy, Sanjay M. Krishnamurthy, 1999, Concurr. Pract. Exp..

Parallel direct solution of linear equations on FPGA-based machines

Sotirios G. Ziavras, Xiaofang Wang, 2003, Proceedings International Parallel and Distributed Processing Symposium.

A personalized recommendation algorithm based on Hadoop

Yaojie Lu, Jianqing Huang, Hao Huang, 2015, 2015 IEEE 5th International Conference on Electronics Information and Emergency Communication.

On the mapping problem for multi-level systems

Sotirios G. Ziavras, 1989, Proceedings of the 1989 ACM/IEEE Conference on Supercomputing (Supercomputing '89).

In-Register Duplication: Exploiting Narrow-Width Value for Improving Register File Reliability

Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, 2006, International Conference on Dependable Systems and Networks (DSN'06).

Plenary lecture 8: reconfigurable chip multiprocessors targeting performance and energy consumption

Sotirios G. Ziavras, 2009 .

Versatile processor design for efficiency and high performance

Sotirios G. Ziavras, 2000, Proceedings International Symposium on Parallel Architectures, Algorithms and Networks. I-SPAN 2000.

Parallel generation of adaptive multiresolution structures for image processing

Xi Li, Sotirios G. Ziavras, Constantine N. Manikopoulos, 1997, Concurr. Pract. Exp..

Low-power multiplierless DCT for image/video coders

Sotirios G. Ziavras, Byoung-Il Kim, 2009, 2009 IEEE 13th International Symposium on Consumer Electronics.

BTB Access Filtering: A Low Energy and High Performance Design

Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

Partially Reconfigurable Vector Processor for Embedded Applications

Sotirios G. Ziavras, Muhammad Z. Hasan, M. Hasan, 2007, J. Comput..

Instruction Fusion for Multiscalar and Many-Core Processors

Yaojie Lu, Sotirios G. Ziavras, 2015, International Journal of Parallel Programming.

On the Characterization and Optimization of On-Chip Cache Reliability against Soft Errors

Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, 2009, IEEE Transactions on Computers.

Performance-Energy Tradeoffs for Matrix Multiplication on FPGA-Based Mixed-Mode Chip Multiprocessors

Sotirios G. Ziavras, Xiaofang Wang, 2007, 8th International Symposium on Quality Electronic Design (ISQED'07).

FPGA-based Vector Processing for Matrix Operations

Hongyan Yang, Jie S. Hu, Sotirios G. Ziavras, 2007, Fourth International Conference on Information Technology (ITNG'07).

Runtime Partial Reconfiguration for Embedded Vector Processors

Sotirios G. Ziavras, Muhammad Z. Hasan, M. Hasan, 2007, Fourth International Conference on Information Technology (ITNG'07).

Connection Machine Results for Pyramid Embedding Algorithms

Sotirios G. Ziavras, 1992, CONPAR.

Energy-Aware System Synthesis for Reconfigurable Chip Multiprocessors

Jie S. Hu, Sotirios G. Ziavras, Xiaofang Wang, 2007, ERSA.

A configurable multiprocessor and dynamic load balancing for parallel LU factorization

Sotirios G. Ziavras, Xiaofang Wang, 2004, 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings..

Robust scalability analysis and SPM case studies

Sotirios G. Ziavras, Dejiang Jin, D. Jin, 2008, The Journal of Supercomputing.

Re-Configurable Parallel Match Evaluators Applied to Scheduling Schemes for Input-Queued Packet Switches

Eiji Oki, Roberto Rojas-Cessa, Sotirios G. Ziavras, 2009, 2009 Proceedings of 18th International Conference on Computer Communications and Networks.

Dataflow computation with intelligent memories emulated on field-programmable gate arrays (FPGAs)

Sotirios G. Ziavras, Segreen Ingersoll, 2002, Microprocess. Microsystems.

Efficient on-chip vector processing for multicore processors

Sotirios G. Ziavras, Spiridon F. Beldianu, 2013, 2013 International Symposium on System on Chip (SoC).

HERA: A RECONFIGURABLE AND MIXED-MODE PARALLEL COMPUTING ENGINE ON PLATFORM FPGAS*

Sotirios G. Ziavras, Xiaofang Wang, 2004 .

Architectural Adaptations for Hierarchical Image Processing/Transmission

Nikitas A. Alexandridis, P. D. Tsanakas, Sotirios G. Ziavras, 1986, International Conference on Intelligent Cloud Computing.

Efficient hardware support for pattern matching in network intrusion detection

Sotirios G. Ziavras, Nitesh B. Guinde, 2010, Comput. Secur..

On-chip Vector Coprocessor Sharing for Multicores

Sotirios G. Ziavras, Spiridon F. Beldianu, 2011, 2011 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing.

Network Embedding Techniques for a New Class of Feasible Parallel Architectures

Qian Wang, Sotirios G. Ziavras, Qian Wang, 1999, Applied Informatics.

Pyramid mappings onto hypercubes for computer vision: Connection machine comparative study

Sotirios G. Ziavras, Muhammad A. Siddiqui, M. A. Siddiqui, 1993, Concurr. Pract. Exp..

FPGA implementation of a Cholesky algorithm for a shared-memory multiprocessor architecture

Sotirios G. Ziavras, Satchidanand G. Haridas, 2004, Parallel Algorithms Appl..

Processor allocation for a class of hypercube-like supercomputers

Sotirios G. Ziavras, Nagasimha G. Haravu, 1992, Proceedings Supercomputing '92.

Exploring branch target buffer access filtering for low-energy and high-performance microarchitectures

Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, 2012, IET Comput. Digit. Tech..

A super-programming approach for mining association rules in parallel on PC clusters

Sotirios G. Ziavras, Dejiang Jin, 2004, IEEE Transactions on Parallel and Distributed Systems.

Preventing Unwanted Social Inferences with Classification Tree Analysis

Quentin Jones, Sara Gatmir-Motahari, Sotirios G. Ziavras, 2009, 2009 21st IEEE International Conference on Tools with Artificial Intelligence.

Exploiting narrow-width values for thermal-aware register file designs

Sung Woo Chung, Shuai Wang, Jie S. Hu, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

Measuring Network Parameters with Hardware Support

Roberto Rojas-Cessa, Sotirios G. Ziavras, Kanchan Devarakonda, 2007, International Conference on Networking and Services (ICNS '07).

Modeling distributed data representation and its effect on parallel data accesses

Sotirios G. Ziavras, Dejiang Jin, 2005, J. Parallel Distributed Comput..

A Coarse-Grain Hierarchical Technique for 2-Dimensional FFT on Configurable Parallel Computers

Sotirios G. Ziavras, Xizhen Xu, 2006, IEICE Trans. Inf. Syst..

Asymmetrically Banked Value-Aware Register Files

Shuai Wang, Hongyan Yang, Jie S. Hu, 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).

A Super-Programming Technique for Large Sparse Matrix Multiplication on PC Clusters

Sotirios G. Ziavras, Dejiang Jin, D. Jin, 2004, IEICE Trans. Inf. Syst..

Performance optimization of an FPGA-based configurable multiprocessor for matrix operations

Sotirios G. Ziavras, Xiaofang Wang, 2003, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798).

Identity Inference as a Privacy Risk in Computer-Mediated Communication

Richard P. Schuler, Quentin Jones, Sotirios G. Ziavras, 2009, 2009 42nd Hawaii International Conference on System Sciences.

RH: A Versatile Family of Reduced Hypercube Interconnection Networks

Sotirios G. Ziavras, 1994, IEEE Trans. Parallel Distributed Syst..

Investigation of Various Mesh Architectures With Broadcast Buses for High-Performance Computing

Sotirios G. Ziavras, 1999, VLSI Design.

Data Broadcasting and Reduction, Prefix Computation, and Sorting on Reduces Hypercube Parallel Computer

Sotirios G. Ziavras, Arup Mukherjee, 1996, Parallel Comput..

Efficient Mapping Algorithms for a Class of Hierarchical Systems

Sotirios G. Ziavras, 1993, IEEE Trans. Parallel Distributed Syst..

A hierarchically-controlled SIMD machine for 2D DCT on FPGAs

Sotirios G. Ziavras, Xizhen Xu, 2005, Proceedings 2005 IEEE International SOC Conference.

A Universal, Dynamically Adaptable and Programmable Network Router for Parallel Computers

Sotirios G. Ziavras, Taras I. Golota, 2001, VLSI Design.

Resource-Driven Optimizations for Transient-Fault Detecting SuperScalar Microarchitectures

Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, 2005, Asia-Pacific Computer Systems Architecture Conference.

FPGA-based Normalization for Modified Gram-Schmidt Orthogonalization

Sotirios G. Ziavras, M. M. Ahmed, Imtiaz Sajid, 2010, VISAPP.

A Parallel Personalized Recommendation Algorithm using Bipartite Graphs

Yaojie Lu, Sotirios G. Ziavras, Hao Huang, 2016 .

Adaptive Multiresolution Structures for Image Processing on Parallel Computers

Peter Meer, Sotirios G. Ziavras, P. Meer, 1994, J. Parallel Distributed Comput..

Exploiting mixed-mode parallelism for matrix operations on the HERA architecture through reconfiguration

Sotirios G. Ziavras, Xiaofang Wang, 2006 .

Plenary lecture VI: heterogeneous reconfigurable chip multiprocessors for embedded systems

Sotirios G. Ziavras, 2008 .

On the Characterization of Data Cache Vulnerability in High-Performance Embedded Microprocessors

Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, 2006, 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

FPGA-based static analysis tool for detecting malicious binaries

Sotirios G. Ziavras, Constantine N. Manikopoulos, Xin Tang, 2010, 2010 The 2nd International Conference on Computer and Automation Engineering (ICCAE).

FPGA-based vector processor for algebraic equation solvers

Hongyan Yang, Sotirios G. Ziavras, Hongyan Yang, 2005, Proceedings 2005 IEEE International SOC Conference.

Pipelined implementation of fixed point square root in FPGA using modified non-restoring algorithm

M. M. Ahmed, I. Sajid, Sotirios G. Ziavras, 2010, 2010 The 2nd International Conference on Computer and Automation Engineering (ICCAE).

Replicating Tag Entries for Reliability Enhancement in Cache Tag Arrays

Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

State transition analysis to detect malicious program behavior

Sotirios G. Ziavras, Constantine N. Manikopoulos, Xin Tang, 2008 .

Multicore-based vector coprocessor sharing for performance and energy gains

Sotirios G. Ziavras, Spiridon F. Beldianu, 2013, TECS.

Parallel DSP algorithms on TurboNet: an experimental system with hybrid message-passing/shared-memory architecture

Sotirios G. Ziavras, Constantine N. Manikopoulos, Xi Li, 1996, Concurr. Pract. Exp..

Generalized reduced hypercube interconnection networks for massively parallel computers

Sotirios G. Ziavras, 1994, Interconnection Networks and Mapping and Scheduling Parallel Computations.

Generalized Anomaly Detection Model for Windows-based Malicious Program Behavior

Sotirios G. Ziavras, Constantine N. Manikopoulos, Xin Tang, 2008, Int. J. Netw. Secur..

Reconfiguration support for vector operations

Hongyan Yang, Jie S. Hu, Sotirios G. Ziavras, 2007, Int. J. High Perform. Syst. Archit..

Connected component labelling on the BLITZEN massively parallel processor

Sotirios G. Ziavras, 1993, Image Vis. Comput..

Coprocessor design to support MPI primitives in configurable multiprocessors

Sotirios G. Ziavras, Alexandros V. Gerbessiotis, Rohan Bafna, 2007 .

Vector Coprocessor Virtualization for Simultaneous Multithreading

Yaojie Lu, Sotirios G. Ziavras, Seyed A. Rooholamin, 2016, TECS.

Novel Pipelined Architecture for Efficient Evaluation of the Square Root Using a Modified Non-Restoring Algorithm

Sotirios G. Ziavras, M. M. Ahmed, Imtiaz Sajid, 2012, J. Signal Process. Syst..

Parallel LU factorization of sparse matrices on FPGA-based configurable computing engines: Research Articles

Sotirios G. Ziavras, Xiaofang Wang, 2004 .

Processor design based on dataflow concurrency

Sotirios G. Ziavras, 2003, Microprocess. Microsystems.

A class of scalable architectures for high-performance, cost-effective parallel computing

Sotirios G. Ziavras, 1994, Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing.

A framework for dynamic resource assignment and scheduling on reconfigurable mixed-mode on-chip multiprocessors

Sotirios G. Ziavras, Xiaofang Wang, Xiaofang Wang, 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

Scalable Multifolded Hypercubes for versatile Parallel Computers

Sotirios G. Ziavras, 1995, Parallel Process. Lett..

FPGA-based vector processing for solving sparse sets of equations

Sotirios G. Ziavras, Muhammad Z. Hasan, 2005, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05).

Customized kernel execution on reconfigurable hardware for embedded applications

Sotirios G. Ziavras, Muhammad Z. Hasan, M. Hasan, 2009, Microprocess. Microsystems.

Optimizing the thermal behavior of subarrayed data caches

Jie S. Hu, Sotirios G. Ziavras, Johnsy K. John, 2005, 2005 International Conference on Computer Design.

Identity Inference as a Privacy Risk in Computer-Mediated Communication

Richard P. Schuler, Quentin Jones, Sotirios G. Ziavras, 2009 .

A Study of Data Exchange Protocols for the Grid Computing Environment

Sotirios G. Ziavras, Dejiang Jin, 2007, International Conference on Networking and Services (ICNS '07).

Improved algorithms for translation of pictures represented by leaf codes

Nikitas A. Alexandridis, Sotirios G. Ziavras, N. Alexandridis, 1988, Image Vis. Comput..

Powerful and feasible processor interconnections with an evaluation of their communications capabilities

Qian Wang, Sotirios G. Ziavras, 1999, Proceedings Fourth International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN'99).

An FPGA-Based Parallel Accelerator for Matrix Multiplications in the Newton-Raphson Method

Tae-Gyu Chang, Sotirios G. Ziavras, Xizhen Xu, 2005, EUC.

Rambo-vision and planning on the connection machine

Daniel DeMenthon, Sotirios G. Ziavras, David Harwood, 1989 .

Resource management for dynamically-challenged reconfigurable systems

Sotirios G. Ziavras, Muhammad Z. Hasan, M. Hasan, 2007, 2007 IEEE Conference on Emerging Technologies and Factory Automation (EFTA 2007).

System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors

Sotirios G. Ziavras, Xiaofang Wang, 2006, 2006 International Conference on Computer Design.

Vector Processing Support for FPGA-Oriented High Performance Applications

Shuai Wang, Hongyan Yang, Jie S. Hu, 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).

Load balancing on PC clusters with the super-programming model

Sotirios G. Ziavras, Dejiang Jin, 2003, 2003 International Conference on Parallel Processing Workshops, 2003. Proceedings..

Iterative Methods for Solving Linear Systems of Equations on FPGA-Based Machines

Sotirios G. Ziavras, Xizhen Xu, 2003, Computers and Their Applications.

A multiprocessor-on-a-programmable-chip reconfigurable system for matrix operations with power-grid case studies

Sotirios G. Ziavras, Xiaofang Wang, 2015, Int. J. Comput. Sci. Eng..

A versatile programming model for dynamic task scheduling on cluster computers

Sotirios G. Ziavras, Dejiang Jin, D. Jin, 2005 .

Self-Adaptive Data Caches for Soft-Error Reliability

Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

On the Problem of Expanding Hypercube-Based Systems

Sotirios G. Ziavras, 1992, J. Parallel Distributed Comput..

On the Exploitation of Narrow-Width Values for Improving Register File Reliability

Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Parallel solution of Newton's power flow equations on configurable chips

Sotirios G. Ziavras, Jeremy R. Johnson, C. Nwankpa, 2007 .

1 A Multiprocessor-ona-Programmable-Chip Reconfigurable System for Matrix Operations with PowerGrid Case Studies

Sotirios G. Ziavras, Xiaofang Wang, 2006 .

COMPUTER SYSTEMS

Sotirios G. Ziavras, 2003 .

Reconfiguration Framework for Multi-kernel Embedded Applications

Sotirios G. Ziavras, Muhammad Z. Hasan, M. Hasan, 2007 .

Mixed-Mode Scheduling for Parallel LU Factorization of Sparse Matrices on the Reconfigurable HERA Computer

Sotirios G. Ziavras, Xiaofang Wang, 2004 .

Method to Measure Packet Processing Time of Internet Hosts with Specialized Packet-Capture Line Card

Sotirios G. Ziavras, Khondaker M. Salehin, R. Rojas-Cessa, 2013 .

Identity Inference as a Privacy Risk in Computer-Mediated Communication

Richard P. Schuler, Sotirios G. Ziavras, Quentin Jones, 2009, 2009 42nd Hawaii International Conference on System Sciences.

An FPGA Based Vector Computer for Sparse Matrix-Vector Processing

Sotirios G. Ziavras, M. Hasan, 2003 .

Matrix Multiplication on an Experimental Parallel System With Hybrid Architecture

Sotirios G. Ziavras, C. Manikopoulos, 2022 .