René Schüffny

发表

On-chip digital noise reduction for integrated CMOS Cameras

Markus Rullmann, Jens-Uwe Schluessler, René Schüffny, 2003, Visual Communications and Image Processing.

Design and evaluation of current-mode image sensors in CMOS-technology

Achim Graupner, René Schüffny, Matthias Tänzer, 2004, IEEE Transactions on Circuits and Systems II: Express Briefs.

An empirical study of the stability of 4th-order Incremental-ΣΔ-ADCs

René Schüffny, Johannes Uhlig, 2011, 2011 NORCHIP.

A location-independent direct link neuromorphic interface

Johannes Schemmel, Steve B. Furber, Luis A. Plana, 2013, The 2013 International Joint Conference on Neural Networks (IJCNN).

An Energy Efficient Multi-Gbit/s NoC Transceiver Architecture With Combined AC/DC Drivers and Stoppable Clocking in 65 nm and 28 nm CMOS

Stephan Henker, Jens-Uwe Schluessler, René Schüffny, 2015, IEEE Journal of Solid-State Circuits.

Pulse coupled neural networks with adaptive synapses for image segmentation

Daniel Matolin, Ulrich Ramacher, Jörg Schreiter, 2004, ARCS Workshops.

Efficient compensation of delay variations in high-speed network-on-chip data links

René Schüffny, Dennis Walter, Sebastian Höppner, 2010, 2010 International Symposium on System on Chip.

Optimized filter banks for the compression of subtraction angiographic images

René Schüffny, Martin Franz, 2003, Seventh International Symposium on Signal Processing and Its Applications, 2003. Proceedings..

Untersuchungen zur Gunn-Elektronik unter besonderer Berücksichtigung der numerischen Analyse

René Schüffny, Rainer Götze, 1977 .

Configurable pulse routing architecture for accelerated multi-node neuromorphic systems

René Schüffny, Johannes Partzsch, Vasilis N. Thanasoulis, 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

An Architectural Study of a Massively Parallel Processor for Convolution-Type Operations in Complex Vision Tasks

René Schüffny, Martin Franz, 1996, ICANN.

A deep-submicron CMOS flow for general-purpose timing-detection insertion

René Schüffny, Dennis Walter, Sebastian Höppner, 2015, 2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES).

Wide swing signal amplification by SC voltage doubling

Huei Wang, Zuo-Min Tsai, René Schüffny, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Segmentation of Blood Vessels in Subtraction Angiographic Images

René Schüffny, Martin Franz, R. Schüffny, 2003, DICTA.

Neighborhood Rank Order Coding for Robust Texture Analysis and Feature Extraction

René Schüffny, Christian Mayr, C. Mayr, 2007, 7th International Conference on Hybrid Intelligent Systems (HIS 2007).

A 10 bit 16 MS/s redundant SAR ADC with flexible window function for a digitally controlled DC-DC converter in 28 nm CMOS

René Schüffny, Sebastian Höppner, Stefan Hänzsche, 2014, 2014 NORCHIP.

A source-synchronous 90Gb/s capacitively driven serial on-chip link over 6mm in 65nm CMOS

Gerhard Fettweis, Stephan Henker, René Schüffny, 2012, 2012 IEEE International Solid-State Circuits Conference.

Neural Schematics as a unified formal graphical representation of large-scale Neural Network Structures

René Schüffny, Matthias Ehrlich, R. Schüffny, 2013, Front. Neuroinform..

High resolution ADPLL frequency synthesizer for FPGA-and ASIC-based applications

Jörg Schreiter, Jens-Uwe Schluessler, René Schüffny, 2003, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798).

A low-power cell-based-design multi-port register file in 65nm CMOS technology

René Schüffny, Johannes Uhlig, Sebastian Höppner, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

CMOS image sensor with shared in-pixel amplifier and calibration facility

Achim Graupner, René Schüffny, M. Tanzer, 2002, Asia-Pacific Conference on Circuits and Systems.

Incremental-ΣΔ-ADCs with dynamic conversion length adaption

René Schüffny, Johannes Uhlig, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

Synapse dynamics in CMOS derived from a model of neurotransmitter release

René Schüffny, Marko Noack, Johannes Partzsch, 2011, 2011 20th European Conference on Circuit Theory and Design (ECCTD).

A model based comparison of BiFeO3 device applicability in neuromorphic hardware

René Schüffny, Christian Mayr, Heidemarie Schmidt, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

Comparison of accumulation units for analog realizations of a path searcher for a UMTS receiver

Achim Graupner, Gerhard Fettweis, René Schüffny, 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

A Software Framework for Mapping Neural Networks to a Wafer-scale Neuromorphic Hardware System

René Schüffny, Karsten Wendt, Daniel Brüderle, 2016, ANNIIP.

Current conveyor based amplifier and adaptive buffer for use in an analog frontend

Stephan Henker, René Schüffny, Christian Mayr, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

Highly integrated packet-based AER communication infrastructure with 3Gevent/S throughput

Stephan Henker, René Schüffny, Johannes Partzsch, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

An Analog VLSI Pulsed Neural Network Implementation for Image Segmentation

Daniel Matolin, Jörg Schreiter, René Schüffny, 2004, Parallel Computing in Electrical Engineering, 2004. International Conference on.

Live demonstration: A 90GBit/s serial NoC link over 6mm in 65nm CMOS technology

René Schüffny, Dennis Walter, Sebastian Höppner, 2013, 2013 European Conference on Circuit Theory and Design (ECCTD).

VLSI implementation of a conductance-based multi-synapse using switched-capacitor circuits

René Schüffny, Marko Noack, Johannes Partzsch, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

OTA based 200 GΩ resistance on 700 μm2 in 180 nm CMOS for neuromorphic applications pdf

Michael Schultz, Stephan Henker, René Schüffny, 2014, ArXiv.

An all-digital PWM generator with 62.5ps resolution in 28nm CMOS technology

René Schüffny, Sebastian Höppner, Stefan Hänzsche, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Accuracy evaluation of numerical methods used in state-of-the-art simulators for spiking neural networks

Stephan Henker, René Schüffny, Johannes Partzsch, 2011, Journal of Computational Neuroscience.

An MPSoC for energy-efficient database query processing

Gerhard Fettweis, Yong Chen, Stephan Henker, 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Live demonstration: Multiple-timescale plasticity in a neuromorphic system

René Schüffny, Marko Noack, Johannes Partzsch, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

BCM and Membrane Potential: Alternative Ways to Timing Dependent Plasticity

René Schüffny, Johannes Partzsch, Christian Mayr, 2008, ICONIP.

Design of parallel preprocessing image sensors

Achim Graupner, Jörg Schreiter, René Schüffny, 1999, 1999 Third International Conference on Knowledge-Based Intelligent Information Engineering Systems. Proceedings (Cat. No.99TH8410).

A novel ADPLL design using successive approximation frequency control

Stephan Henker, René Schüffny, Christian Mayr, 2009, Microelectron. J..

A 335Mb/s 3.9mm2 65nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates

Gerhard Fettweis, René Schüffny, Emil Matús, 2012, 2012 IEEE International Solid-State Circuits Conference.

A Compact Clock Generator for Heterogeneous GALS MPSoCs in 65-nm CMOS Technology

Stephan Henker, René Schüffny, Dennis Walter, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Long-term pulse stimulation and recording in an accelerated neuromorphic system

René Schüffny, Johannes Partzsch, Christian Mayr, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

Characterization and Compensation of Network-Level Anomalies in Mixed-Signal Neuromorphic Modeling Platforms

Johannes Schemmel, Karlheinz Meier, Anders Lansner, 2014, PloS one.

Waveform Driven Plasticity in BiFeO3 Memristive Devices: Model and Implementation

Nan Du, René Schüffny, Johannes Partzsch, 2012, NIPS.

A 14 bit self-calibrating charge redistribution SAR ADC

Stephan Henker, René Schüffny, Stefan Hänzsche, 2012, 2012 IEEE International Symposium on Circuits and Systems.

Live demonstration: Packet-based AER with 3Gevent/s cumulative throughput

Stephan Henker, René Schüffny, Johannes Partzsch, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

A pulse communication flow ready for accelerated neuromorphic experiments

René Schüffny, Johannes Partzsch, Vasilis N. Thanasoulis, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Parallel mapping algorithms for a novel mapping & configuration software for the FACETS project

René Schüffny, Karsten Wendt, Matthias Ehrlich, 2008 .

Hybrid incremental-ΣΔ-ADC for ambient light sensing applications

Johannes Gorner, René Schüffny, Stefan Hänzsche, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A VLSI chip for wavelet image compression

René Schüffny, Michael Scholles, M. Traber, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Transient responses of activity-dependent synapses to modulated pulse trains

René Schüffny, Johannes Partzsch, Christian Mayr, 2009, Neurocomputing.

A power management architecture for fast per-core DVFS in heterogeneous MPSoCs

René Schüffny, Sebastian Höppner, Georg Ellguth, 2012, 2012 IEEE International Symposium on Circuits and Systems.

Integrated circuits processing chemical information: Prospects and challenges

Stephan Henker, Andreas Richter, René Schüffny, 2014, DATE.

An energy efficient multi-bit TSV transmitter using capacitive coupling

Johannes Gorner, René Schüffny, Michael Haas, 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Dedicated FPGA communication architecture and design for a large-scale neuromorphic system

René Schüffny, Johannes Partzsch, Christian Mayr, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

A Biological-Realtime Neuromorphic System in 28 nm CMOS Using Low-Leakage Switched Capacitor Circuits

René Schüffny, Marko Noack, Johannes Partzsch, 2014, IEEE Transactions on Biomedical Circuits and Systems.

Developing structural constraints on connectivity for biologically embedded neural networks

René Schüffny, Johannes Partzsch, 2012, Biological Cybernetics.

Analyzing the Scaling of Connectivity in Neuromorphic Hardware and in Models of Neural Networks

René Schüffny, Johannes Partzsch, R. Schüffny, 2011, IEEE Transactions on Neural Networks.

An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights

Daniel Matolin, Ulrich Ramacher, Jörg Schreiter, 2002, ICANN.

A 12-b 4-MS/s SAR ADC With Configurable Redundancy in 28-nm CMOS Technology

René Schüffny, Sebastian Höppner, Stefan Hänzsche, 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

Minimizing charge injection errors in high-precision, high-speed SC-circuits

Achim Graupner, Jörg Schreiter, René Schüffny, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Behavioral model of a continuous current integrator with time discrete feedback and sampling

Johannes Gorner, René Schüffny, Johannes Uhlig, 2013, 2013 European Conference on Circuit Theory and Design (ECCTD).

Rapid prototyping of higher order incremental ΣΔ-ADC topologies and NTFs

Thomas Reichel, René Schüffny, Johannes Uhlig, 2013, 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS).

Mapping Complex, Large – Scale Spiking Networks on Neural VLSI

Stephan Henker, René Schüffny, Christian Mayr, 2007 .

Pattern representation and recognition with accelerated analog neuromorphic systems

Robert A. Legenstein, Wolfgang Maass, René Schüffny, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

A comprehensive workflow for general-purpose neural modeling with highly configurable neuromorphic hardware systems

Johannes Schemmel, Karlheinz Meier, Anders Lansner, 2010, Biological Cybernetics.

Bridging the gap between software simulation and emulation on neuromorphic hardware: An investigation of causes, effects and compensation of network-level anomalies in a mixed-signal waferscale neuromorphic modeling platform pdf

Johannes Schemmel, Karlheinz Meier, Anders Lansner, 2014, ArXiv.

A heterogeneous SDR MPSoC in 28nmCMOS for low-latency wireless applications

Gerhard Fettweis, Norbert Wehn, Yong Chen, 2017, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).

GMPath - A Path Language for Navigation, Information Query and Modification of Data Graphs

René Schüffny, Karsten Wendt, Matthias Ehrlich, 2010, ANNIIP.

A Fast-Locking ADPLL With Instantaneous Restart Capability in 28-nm CMOS Technology

René Schüffny, Dennis Walter, Sebastian Höppner, 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.

On the Relation between Bursts and Dynamic Synapse Properties: a Modulation-Based Ansatz

René Schüffny, Johannes Partzsch, Christian Mayr, 2009, Comput. Intell. Neurosci..

A compact on-chip IR-drop measurement system in 28 nm CMOS technology

Stephan Henker, René Schüffny, Sebastian Höppner, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

A 32 GBit/s communication SoC for a waferscale neuromorphic system

Stephan Henker, René Schüffny, Johannes Partzsch, 2012, Integr..

A database accelerator for energy-efficient query processing and optimization

Wolfgang Lehner, Gerhard P. Fettweis, René Schüffny, 2016, 2016 IEEE Nordic Circuits and Systems Conference (NORCAS).

Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System pdf

Massimiliano Giulioni, Paolo Del Giudice, René Schüffny, 2019, Journal of Signal Processing Systems.

Concept of Color Correction on Multi-Channel CMOS Sensors

Stephan Henker, Jens-Uwe Schluessler, René Schüffny, 2003, DICTA.

Analysis of a charge redistribution SAR ADC with partially thermometer coded DAC

René Schüffny, Stefan Hänzsche, R. Schüffny, 2013, 2013 European Conference on Circuit Theory and Design (ECCTD).

A graph theoretical approach for a multistep mapping software for the FACETS project

René Schüffny, Karsten Wendt, Matthias Ehrlich, 2008 .

Replicating experimental spike and rate based neural learning in CMOS

René Schüffny, Marko Noack, Johannes Partzsch, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

A system-on-chip realization of a CMOS image sensor with programmable analog image preprocessing

Achim Graupner, Jörg Schreiter, René Schüffny, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Applying Spiking Neural Nets to Noise Shaping pdf

René Schüffny, Christian Mayr, 2005, IEICE Trans. Inf. Syst..

On the routing complexity of neural network models - Rent's Rule revisited

René Schüffny, Johannes Partzsch, R. Schüffny, 2009, ESANN.

Reducing the computational footprint for real-time BCPNN learning

Anders Lansner, René Schüffny, Johannes Partzsch, 2015, Front. Neurosci..

Abbildung komplexer, pulsierender, neuronaler Netzwerke auf spezielle Neuronale VLSI Hardware

René Schüffny, Christian Mayr, Karsten Wendt, 2007 .

A critique of BCM behavior verification for STDP-type plasticity models

René Schüffny, Johannes Partzsch, Christian Mayr, 2010, ESANN.

Application-specific architectures for energy-efficient database query processing and optimization

Gerhard Fettweis, Wolfgang Lehner, René Schüffny, 2017, Microprocess. Microsystems.

Live demonstration: Ethernet communication linking two large-scale neuromorphic systems

Steve B. Furber, Luis A. Plana, René Schüffny, 2013, 2013 European Conference on Circuit Theory and Design (ECCTD).

A Calibration Technique for Bang-Bang ADPLLs Using Jitter Distribution Monitoring

René Schüffny, Johannes Partzsch, Christian Mayr, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Analog implementation for networks of integrate-and-fire neurons with adaptive local connectivity

Ulrich Ramacher, Jörg Schreiter, René Schüffny, 2002, Proceedings of the 12th IEEE Workshop on Neural Networks for Signal Processing.

Switched-capacitor realization of presynaptic short-term-plasticity and stop-learning synapses in 28 nm CMOS

René Schüffny, Marko Noack, Johannes Partzsch, 2014, Front. Neurosci..

A vision device for image processing

Achim Graupner, Jörg Schreiter, René Schüffny, 2001, SIP.

Concept o f C olor C orrection o n Multi-Channel C MOS S ensors

Stephan Henker, René Schüffny, Jens-Uwe Schlussler, 2003 .

On-Chip Measurement and Compensation of Timing Imbalances in High-Speed Serial NoC Links

René Schüffny, Dennis Walter, Sebastian Höppner, 2012, Int. J. Embed. Real Time Commun. Syst..

Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation

Daniel Matolin, Ulrich Ramacher, Jörg Schreiter, 2004, IS&T/SPIE Electronic Imaging.

Live demonstration: A scaled-down version of the BrainScaleS wafer-scale neuromorphic system

Johannes Schemmel, Karlheinz Meier, René Schüffny, 2012, 2012 IEEE International Symposium on Circuits and Systems.

Mismatch characterization of high-speed NoC links using asynchronous sub-sampling

René Schüffny, Dennis Walter, Sebastian Höppner, 2011, 2011 International Symposium on System on Chip (SoC).

Gabor-Like Image Filtering Using a Neural Microcircuit

René Schüffny, Christian Mayr, Arne Heittmann, 2007, IEEE Transactions on Neural Networks.

A low-power continuous-time incremental 2nd-order-MASH ΣΔ-modulator for a CMOS imager

Joachim Haase, René Schüffny, Harald Neubauer, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

A fixed point exponential function accelerator for a neuromorphic many-core system

Steve B. Furber, René Schüffny, David R. Lester, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Practical guide for validated memristance measurements.

René Schüffny, Oliver G Schmidt, Christian Mayr, 2013, The Review of scientific instruments.