Narinderjit Singh

Reliability automation tool (RAT) for fault tolerance computation

Narinderjit Singh, Nor Hisham Hamid, Vijanth S. Asirvadam, 2012 .

Reliability-evaluation of digital circuits using probabilistic computation schemes

Narinderjit Singh, Vijanth S. Asirvadam, Jahanzeb Anwer, 2011, 2011 National Postgraduate Conference.

Improvement in reliability by changing the deterministic inputs of nanoscale circuits

Narinderjit Singh, Vijanth S. Asirvadam, Jahanzeb Anwer, 2011, 2011 IEEE Regional Symposium on Micro and Nano Electronics.

Evaluating the Effectiveness of Digital Storytelling with Panoramic Images to Facilitate Experience Sharing

Narinderjit Singh, Nor Laila Md. Noor, Zuraidah Sulaiman, 2007, HCI.

Determination of sensitive inputs of nanoscale digital circuits using Bayesian network analysis

Narinderjit Singh, Vijanth S. Asirvadam, Jahanzeb Anwer, 2011, 2011 IEEE Regional Symposium on Micro and Nano Electronics.

Highly noise-tolerant design of digital logic gates using Markov Random Field modelling

Narinderjit Singh, Vijanth S. Asirvadam, Jahanzeb Anwer, 2010, 2010 2nd International Conference on Electronic Computer Technology.

Computation and analysis of output error probability for C17 benchmark circuit using bayesian networks error modeling

Narinderjit Singh, Vijanth S. Asirvadam, Jahanzeb Anwer, 2010, 2010 IEEE Student Conference on Research and Development (SCOReD).

Reliability Programmed Tool and its Application for Fault Tolerance Computation

Narinderjit Singh, Nor Hisham Hamid, Vijanth S. Asirvadam, 2014 .

Joint and marginal probability analyses of Markov Random Field networks for digital logic circuits

Narinderjit Singh, Vijanth S. Asirvadam, Jahanzeb Anwer, 2010, 2010 International Conference on Intelligent and Advanced Systems.