Herbert Struyf

Damascene Benchmark of Ru, Co and Cu in Scaled Dimensions

S. Decoster, K. Croes, I. Ciofi, 2018, 2018 IEEE International Interconnect Technology Conference (IITC).

High yield sub-0.1µm2 6T-SRAM cells, featuring high-k/metal-gate finfet devices, double gate patterning, a novel fin etch strategy, full-field EUV lithography and optimized junction design & layout

K. Ronse, S. Locorotondo, V. Truffert, 2010, 2010 Symposium on VLSI Technology.