R. Nakazawa

Ultrafast parallel reconfiguration of 3D-stacked reconfigurable spin logic chip with on-chip SPRAM (SPin-transfer torque RAM)

H. Ohno, M. Koyanagi, K. Kiyoyama, 2012, 2012 Symposium on VLSI Technology (VLSIT).

Write Speed Evaluation of Reconfigurable Spin Logic Block with SPRAM for 3D-Stacked Reconfigurable Spin Processor

R. Nakazawa, K. Kiyoyama, Tetsu Tanaka, 2011 .