Pierre-Emmanuel Gaillardon

发表

Using OxRRAM memories for improving communications of reconfigurable FPGA architectures

Fabien Clermidy, Santhosh Onkaraiah, Pierre-Emmanuel Gaillardon, 2011, 2011 IEEE/ACM International Symposium on Nanoscale Architectures.

Fault modeling in controllable polarity silicon nanowire circuits

Hassan Ghasemzadeh, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

- Low-Power FPGAs Based on Resistive Memories

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2018, Reconfigurable Logic.

Physical design of polarity controllable transistors

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Odysseas Zografos, 2018 .

Self-checking ripple-carry adder with Ambipolar Silicon NanoWire FET

Ogun Turkyilmaz, Fabien Clermidy, Giovanni De Micheli, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization pdf

Azadeh Davoodi, Zhiru Zhang, Sergio Bampi, 2020, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Digital, analog and RF design opportunities of three-independent-gate transistors

Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Mehdi Hasan, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Reconfigurable Logic Architectures based on Disruptive Technologies

Pierre-Emmanuel Gaillardon, P. Gaillardon, 2011 .

Emerging memory technologies for reconfigurable routing in FPGA architecture

Fabien Clermidy, Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

A Survey on Low-Power Techniques with Emerging Technologies

Giovanni De Micheli, Edith Beigné, Suzanne Lesecq, 2015, ACM J. Emerg. Technol. Comput. Syst..

Process/design co-optimization of regular logic tiles for double-gate silicon nanowire transistors

Yusuf Leblebici, Giovanni De Micheli, Jian Zhang, 2012, 2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

A Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only)

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2016, FPGA.

Logic Synthesis for RRAM-Based In-Memory Computing

Rolf Drechsler, Mathias Soeken, Pierre-Emmanuel Gaillardon, 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors

Pierre-Emmanuel Gaillardon, Patsy Cadareanu, Ganesh Gore, 2019, VLSI-SoC.

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains

Giovanni De Micheli, Mathias Soeken, Paolo Ienne, 2017, ACM Great Lakes Symposium on VLSI.

Optimizing Majority-Inverter Graphs with functional hashing

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Phase-change-memory-based storage elements for configurable logic

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2010, 2010 International Conference on Field-Programmable Technology.

Memristive logic: A framework for evaluation and comparison

Pierre-Emmanuel Gaillardon, John Reuben, Nishil Talati, 2017, 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Practical challenges in delivering the promises of real processing-in-memory machines

Pierre-Emmanuel Gaillardon, Ronny Ronen, Nishil Talati, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Emerging Reconfigurable Nanotechnologies: Can they support Future Electronics?

Narayanan Vijaykrishnan, Xiaobo Sharon Hu, Pierre-Emmanuel Gaillardon, 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Physical Design Considerations of One-level RRAM-based Routing Multiplexers

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2017, ISPD.

Tunnel FET-based security primitive design

Michael Niemier, Yier Jin, Pierre-Emmanuel Gaillardon, 2018 .

Adaptive Packing for Design Space Exploration of FPGA Logic Block Architectures

Pierre-Emmanuel Gaillardon, 2018 .

SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks

Rajeev Balasubramonian, Pierre-Emmanuel Gaillardon, Surya Narayanan, 2020, 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA).

An FPGA-Based Test System for RRAM Technology Characterization

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Armando Biscontini, 2018, IEEE Transactions on Nanotechnology.

Exploratory logic synthesis for multiple independent gate FETs

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Subhasish Mitra, 2018 .

Vertically-stacked double-gate nanowire FETs with controllable polarity: From devices to regular ASICs

Yusuf Leblebici, Giovanni De Micheli, Luca Gaetano Amarù, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Guest Editorial Memristive-Device-Based Computing

Tajana Simunic, Dietmar Fey, Said Hamdioui, 2018, IEEE Trans. Very Large Scale Integr. Syst..

Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs

Giovanni De Micheli, Jian Zhang, Pierre-Emmanuel Gaillardon, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

Interconnection scheme and associated mapping method of reconfigurable cell matrices based on nanoscale devices

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2009, 2009 IEEE/ACM International Symposium on Nanoscale Architectures.

Towards structured ASICs using polarity-tunable Si nanowire transistors

Yusuf Leblebici, Giovanni De Micheli, Luca Gaetano Amarù, 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

A surface potential and current model for polarity-controllable silicon nanowire FETs

Giovanni De Micheli, Jian Zhang, Pierre-Emmanuel Gaillardon, 2015, 2015 45th European Solid State Device Research Conference (ESSDERC).

Differential Power Analysis Mitigation Technique Using Three-Independent-Gate Field Effect Transistors

Pierre-Emmanuel Gaillardon, Edouard Giacomin, 2018, 2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

Majority-Inverter Graph: A novel data-structure and algorithms for efficient logic optimization

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

Logic Synthesis for Majority Based In-Memory Computing

Rolf Drechsler, Mathias Soeken, Pierre-Emmanuel Gaillardon, 2017 .

New Logic Synthesis as Nanotechnology Enabler

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2015, Proceedings of the IEEE.

OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs

Pierre-Emmanuel Gaillardon, Xifan Tang, Edouard Giacomin, 2019, 2019 29th International Conference on Field Programmable Logic and Applications (FPL).

Data compression via logic synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Andreas Peter Burg, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

Background and Motivation

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2012 .

A Compiler for Parallel and Resource-Constrained Programmable in-Memory Computing

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Gaillardon, 2017 .

MIXSyn: An efficient logic synthesis methodology for mixed XOR-AND/OR dominated circuits

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design

Yusuf Leblebici, Giovanni De Micheli, Andreas Peter Burg, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

Evaluation of a crossbar multiplexer in a lithography-based nanowire technology

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation

Hassan Ghasemzadeh, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Extending Boolean Methods for Scalable Logic Synthesis

Mathias Soeken, Eleonora Testa, Alan Mishchenko, 2020, IEEE Access.

BDS-MAJ: A BDD-based logic synthesis tool exploiting majority logic decomposition

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

Introduction to the Special Section on Functionality-Enhanced Devices

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Subhasish Mitra, 2014 .

A Sound and Complete Axiomatization of Majority-n Logic

Giovanni De Micheli, Luca Gaetano Amarù, Anupam Chattopadhyay, 2015, IEEE Trans. Computers.

A fast pruning technique for low-power inexact Circuit design

Giovanni De Micheli, Luca Gaetano Amarù, Krishna V. Palem, 2015, 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS).

A study on buffer distribution for RRAM-based FPGA routing structures

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2015, 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS).

A high-performance low-power near-Vt RRAM-based FPGA

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2014, 2014 International Conference on Field-Programmable Technology (FPT).

Restructuring of Arithmetic Circuits with Biconditional Binary Decision Diagrams

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Andreas Burg, 2014 .

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Hassan Ghasemzadeh Mohammadi, 2015, IEEE Transactions on Nanotechnology.

A Recursive Approach to Partially Blind Calibration of a Pollution Sensor Network

Pierre-Emmanuel Gaillardon, Tofigh Sayahi, Thomas Becnel, 2019, 2019 IEEE International Conference on Embedded Software and Systems (ICESS).

FPGA-SPICE: A simulation-based power estimation framework for FPGAs

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2015, 2015 33rd IEEE International Conference on Computer Design (ICCD).

Can we go towards true 3-D architectures?

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

Efficient arithmetic logic gates using double-gate silicon nanowire FETs

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Luca Arnani, 2013, 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS).

Optimization opportunities in RRAM-based FPGA architectures

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2017, 2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS).

A Robust Digital RRAM-Based Convolutional Block for Low-Power Image Processing and Learning Applications

Pierre-Emmanuel Gaillardon, Shahar Kvatinsky, Edouard Giacomin, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

Disruptive Logic Architectures and Technologies: From Device to System Level

Fabien Clermidy, Pierre-Emmanuel Gaillardon, Ian O'Connor, 2012 .

Reversible Logic Synthesis via Biconditional Binary Decision Diagrams

Giovanni De Micheli, Luca Gaetano Amarù, Anupam Chattopadhyay, 2015, 2015 IEEE International Symposium on Multiple-Valued Logic.

A Continuous Compact DC Model for Dual-Independent-Gate FinFETs

Pierre-Emmanuel Gaillardon, Mehdi Hasan, Berardi Sensale-Rodriguez, 2017, IEEE Journal of the Electron Devices Society.

An efficient electronic measurement interface for memristive biosensors

Giovanni De Micheli, Sandro Carrara, Pierre-Emmanuel Gaillardon, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Fast logic synthesis for RRAM-based in-memory computing using Majority-Inverter Graphs

Rolf Drechsler, Mathias Soeken, Pierre-Emmanuel Gaillardon, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Low-power multiplexer designs using three-independent-gate field effect transistors

Pierre-Emmanuel Gaillardon, Edouard Giacomin, Jorge Romero Gonzalez, 2017, 2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

Enabling exact delay synthesis

Robert K. Brayton, Giovanni De Micheli, Mathias Soeken, 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Inversion Minimization in Majority-Inverter Graphs

Giovanni De Micheli, Mathias Soeken, Eleonora Testa, 2016 .

3.5-D integration: A case study

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Vasilis F. Pavlidis, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

An Efficient Adder Architecture with Three- Independent-Gate Field-Effect Transistors

Pierre-Emmanuel Gaillardon, Jorge Romero Gonzalez, 2018, 2018 IEEE International Conference on Rebooting Computing (ICRC).

Endurance management for resistive Logic-In-Memory computing architectures

Rolf Drechsler, Giovanni De Micheli, Mathias Soeken, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

System Level Benchmarking with Yield-Enhanced Standard Cell Library for Carbon Nanotube VLSI Circuits

Giovanni De Micheli, H.-S. Philip Wong, Pierre-Emmanuel Gaillardon, 2014, JETC.

Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.

An MIG-based compiler for programmable logic-in-memory architectures

Rolf Drechsler, Giovanni De Micheli, Mathias Soeken, 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).

A RRAM-based FPGA for Energy-efficient Edge Computing

Pierre-Emmanuel Gaillardon, Xifan Tang, Patsy Cadareanu, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Building Air Quality Sensors & Inspiring Citizen Scientists

Pierre-Emmanuel Gaillardon, Anthony Butterfield, Kerry E. Kelly, 2018 .

A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors

Pierre-Emmanuel Gaillardon, Patsy Cadareanu, Ganesh Gore, 2019, 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC).

3D technologies for reconfigurable architectures

Olivier Billoint, Fabien Clermidy, Pierre-Emmanuel Gaillardon, 2014, 2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection

Hassan Ghasemzadeh, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2014, 2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

OpenFPGA: An Open-Source Framework for Agile Prototyping Customizable FPGAs

Pierre-Emmanuel Gaillardon, Xifan Tang, Edouard Giacomin, 2020, IEEE Micro.

Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop

M. Nataraj, Jean-Philippe Noël, Bastien Giraud, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Post-P&R Performance and Power Analysis for RRAM-Based FPGAs

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2018, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

3-D Sequential Integration: A Key Enabling Technology for Heterogeneous Co-Integration of New Function With CMOS

Thomas Ernst, Pierre-Emmanuel Gaillardon, Perrine Batude, 2012, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Emerging Technology-Based Design of Primitives for Hardware Security

Giovanni De Micheli, Michael T. Niemier, Xiaobo Sharon Hu, 2016, JETC.

Improving Logic Optimization in Sequential Circuits using Majority-inverter Graphs

Pierre-Emmanuel Gaillardon, Luca G. Amarù, Xifan Tang, 2019, 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Exact Benchmark Circuits for Logic Synthesis

Felipe S. Marranghello, Renato P. Ribas, Pierre-Emmanuel Gaillardon, 2020, IEEE Design & Test.

A ReRAM-based non-volatile flip-flop with sub-VT read and CMOS voltage-compatible write

Giovanni De Micheli, Andreas Peter Burg, Pierre-Emmanuel Gaillardon, 2013, 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS).

A Taxonomy and Evaluation Framework for Memristive Logic

Pierre-Emmanuel Gaillardon, Nishil Talati, Shahar Kvatinsky, 2019, Handbook of Memristor Networks.

Majority-based synthesis for nanotechnologies

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).

A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories

Pierre-Emmanuel Gaillardon, Xifan Tang, Joao Vieira, 2019, 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC).

LSOracle: a Logic Synthesis Framework Driven by Artificial Intelligence: Invited Paper

Pierre-Emmanuel Gaillardon, Xifan Tang, Walter Lau Neto, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Three-Independent-Gate Transistors: Opportunities in digital, analog and RF applications

Luca Gaetano Amarù, Edith Beigné, Pierre-Emmanuel Gaillardon, 2016, 2016 17th Latin-American Test Symposium (LATS).

A fast TCAD-based methodology for Variation analysis of emerging nano-devices

Hassan Ghasemzadeh, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2013, 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS).

Architectural Impact of 3D Configuration and Routing Schemes

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2012 .

Resistive Switching Memory Architecture Based on Polarity Controllable Selectors

Ian O'Connor, Bastien Giraud, Jean-Philippe Noel, 2019, IEEE Transactions on Nanotechnology.

A Scalable Mixed Synthesis Framework for Heterogeneous Networks

Pierre-Emmanuel Gaillardon, Xifan Tang, Walter Lau Neto, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

GenCache: Leveraging In-Cache Operators for Efficient Sequence Alignment

Rajeev Balasubramonian, Pierre-Emmanuel Gaillardon, Ryan Stutsman, 2019, MICRO.

Reducing transistor count in clocked standard cells with ambipolar double-gate FETs

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2010, 2010 IEEE/ACM International Symposium on Nanoscale Architectures.

Multiple Independent Gate FETs: How many gates do we need?

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2015, The 20th Asia and South Pacific Design Automation Conference.

Computationally Efficient Multiple-Independent-Gate Device Model

Mariagrazia Graziano, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2016, IEEE Transactions on Nanotechnology.

Exploiting inherent characteristics of reversible circuits for faster combinational equivalence checking

Robert Wille, Giovanni De Micheli, Luca Gaetano Amarù, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Accelerating Inference on Binary Neural Networks with Digital RRAM Processing

David Atienza, Marina Zapater, Pierre-Emmanuel Gaillardon, 2019, VLSI-SoC.

A Novel TIGFET-based DFF Design for Improved Resilience to Power Side-Channel Attacks

Yier Jin, Michael T. Niemier, Xiaobo Sharon Hu, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Reliable and high performance STT-MRAM architectures based on controllable-polarity devices

Michael T. Niemier, Xiaobo Sharon Hu, Yu Bi, 2015, 2015 33rd IEEE International Conference on Computer Design (ICCD).

Accurate power analysis for near-Vt RRAM-based FPGA

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2015, 2015 25th International Conference on Field Programmable Logic and Applications (FPL).

Towards the use of functionality-enhanced devices: A transversal design approach

Pierre-Emmanuel Gaillardon, 2014, 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).

A Resistive Random Access Memory Addon for the NCSU FreePDK 45 nm

Pierre-Emmanuel Gaillardon, Edouard Giacomin, 2019, IEEE Transactions on Nanotechnology.

BCB Evaluation of High-Performance and Low-Leakage Three-Independent-Gate Field-Effect Transistors

Pierre-Emmanuel Gaillardon, Jorge Romero-González, 2018, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits.

Wave pipelining for majority-based beyond-CMOS technologies

Rudy Lauwereins, Giovanni De Micheli, Mathias Soeken, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

RM3 based logic synthesis (Special session paper)

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Gaillardon, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Reconfigurable nanoscale logic cells : a comparison study

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

BCB benchmarking for three-independent-gate field effect transistors

Pierre-Emmanuel Gaillardon, Jorge Romero-González, 2018 .

Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only)

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2015, FPGA.

Innovative Structures for Routing and Configuration

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2012 .

Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2014, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Disruptive Logic Blocks

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2012 .

A Novel FPGA Architecture Based on Ultrafine Grain Reconfigurable Logic Cells

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

The Programmable Logic-in-Memory (PLiM) computer

Giovanni De Micheli, Luca Gaetano Amarù, Anupam Chattopadhyay, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A ultra-low-power FPGA based on monolithically integrated RRAMs

Yusuf Leblebici, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

TSPC Flip-Flop circuit design with three-independent-gate silicon nanowire FETs

Giovanni De Micheli, Jian Zhang, Pierre-Emmanuel Gaillardon, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Leveraging Emerging Technology for Hardware Security - Case Study on Silicon Nanowire FETs and Graphene SymFETs

Michael T. Niemier, Xiaobo Sharon Hu, Yu Bi, 2014, 2014 IEEE 23rd Asian Test Symposium.

Pattern-based FPGA logic block and clustering algorithm

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

A PLiM Computer for the Internet of Things

Rolf Drechsler, Giovanni De Micheli, Mathias Soeken, 2017, Computer.

Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Stefan De Gendt, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Multi-level logic benchmarks: An exactness study

Giovanni De Micheli, Mathias Soeken, Patrick Vuillod, 2017, 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC).

Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study

Hassan Ghasemzadeh, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2013, 2013 14th Latin American Test Workshop - LATW.

Majority-Inverter Graph for FPGA Synthesis

Giovanni De Micheli, David Novo, Paolo Ienne, 2015 .

Scalable Boolean Methods in a Modern Synthesis Flow

Giovanni De Micheli, Mathias Soeken, Patrick Vuillod, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

On the Design of a Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

Hassan Ghasemzadeh, Giovanni De Micheli, Matteo Sonza Reorda, 2015, ISVLSI 2015.

Disruptive Architectural Proposals and Performance Analysis

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2012 .

A Circuit Synthesis Flow for Controllable-Polarity Transistors

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Luca Amaru, 2014, IEEE Transactions on Nanotechnology.

A Distributed Low-Cost Pollution Monitoring Platform

Jonathan Whitaker, Pierre-Emmanuel Gaillardon, Anthony Butterfield, 2019, IEEE Internet of Things Journal.

Wire-Aware Architecture and Dataflow for CNN Accelerators

Rajeev Balasubramonian, Pierre-Emmanuel Gaillardon, Surya Narayanan, 2019, MICRO.

GMS: Generic memristive structure for non-volatile FPGAs

Yusuf Leblebici, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2012, 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC).

Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization

Giovanni De Micheli, Enrico Macii, Massimo Poncino, 2015, ACM Great Lakes Symposium on VLSI.

Matrix Nanodevice-Based Logic Architectures and Associated Functional Mapping Method

Fabien Clermidy, Ian O'Connor, Gabriela Nicolescu, 2011, JETC.

Reconfigurable Logic : Architecture, Tools, and Applications

Pierre-Emmanuel Gaillardon, Krzysztof Iniewski, 2015 .

Memory Effects in Multi-terminal Solid State Devices and Their Applications

Giovanni De Micheli, Yusuf Leblebici, Pierre-Emmanuel Gaillardon, 2019, Handbook of Memristor Networks.

Advanced system on a chip design based on controllable-polarity FETs

Giovanni De Micheli, Jian Zhang, Luca Gaetano Amarù, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Notes on Majority Boolean Algebra

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù, 2016, 2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL).

The EPFL Combinational Benchmark Suite

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Luca Amaru, 2015 .

C$^\text{2}$TIG: Dynamic C$^\text{2}$MOS Design Based on Three-Independent-Gate Field-Effect Transistors

Pierre-Emmanuel Gaillardon, Adam Teman, Daniel Vana, 2020, IEEE Transactions on Nanotechnology.

A High-Performance FPGA Architecture Using One-Level RRAM-Based Multiplexers

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2017, IEEE Transactions on Emerging Topics in Computing.

On the Design of a Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

Hassan Ghasemzadeh, Giovanni De Micheli, Jian Zhang, 2015, 2015 IEEE Computer Society Annual Symposium on VLSI.

Majority Logic Synthesis for Spin Wave Technology

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2014, 2014 17th Euromicro Conference on Digital System Design.

Mapping method of reconfigurable cell matrices based on nanoscale devices using inter-stage fixed interconnection scheme

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

Dual-threshold-voltage configurable circuits with three-independent-gate silicon nanowire FETs

Giovanni De Micheli, Jian Zhang, Pierre-Emmanuel Gaillardon, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

LUT Mapping and Optimization for Majority-Inverter Graphs

Giovanni De Micheli, Mathias Soeken, Winston Haaswijk, 2016 .

Ultra-fine grain FPGAs: A granularity study

Fabien Clermidy, Ian O'Connor, Pierre-Emmanuel Gaillardon, 2011, 2011 IEEE/ACM International Symposium on Nanoscale Architectures.

Power-Gated Differential Logic Style Based on Double-Gate Controllable-Polarity Transistors

Giovanni De Micheli, Jian Zhang, Luca Gaetano Amarù, 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.

Majority-Inverter Graph: A New Paradigm for Logic Optimization

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Novel grid-based power routing scheme for regular controllable-polarity FET arrangements

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Odysseas Zografos, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Co-Design of ReRAM Passive Crossbar Arrays Integrated in 180 nm CMOS Technology

Yusuf Leblebici, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2016, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Emerging Technologies and Nanoscale Computing Fabrics

Fabien Clermidy, Ian O'Connor, Gabriela Nicolescu, 2009, VLSI-SoC.

Novel configurable logic block architecture exploiting controllable-polarity transistors

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2014, 2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

A Study on Switch Block Patterns for Tileable FPGA Routing Architectures

Pierre-Emmanuel Gaillardon, Xifan Tang, Edouard Giacomin, 2019, 2019 International Conference on Field-Programmable Technology (ICFPT).

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

NEM relay design with biconditional binary decision diagrams

Giovanni De Micheli, Winston Haaswijk, Luca Gaetano Amarù, 2015, Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH´15).

Rebooting Our Computing Models

Pierre-Emmanuel Gaillardon, Koen Bertels, Carmen G. Almudéver, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A new basic logic structure for data-path computation (abstract only)

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2014, FPGA.

Exploiting Circuit Duality to Speed up SAT

Giovanni De Micheli, Alan Mishchenko, Luca Gaetano Amarù, 2015, 2015 IEEE Computer Society Annual Symposium on VLSI.

Biconditional BDD: A novel canonical BDD for logic synthesis targeting XOR-rich circuits

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A Study on the Programming Structures for RRAM-Based FPGA Architectures

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Xifan Tang, 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

The Programmable Logic-in-Memory (PLiM) Computer (Invited)

Giovanni De Micheli, Anupam Chattopadhyay, Anne Siemon, 2016, DATE 2016.

A novel basis for logic rewriting

Giovanni De Micheli, Mathias Soeken, Winston Haaswijk, 2017, 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC).

An efficient manipulation package for Biconditional Binary Decision Diagrams

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

SATSoT: A methodology to map controllable-polarity devices on a regular fabric using SAT

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Catherine Gasnier, 2013, 2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

Inversion optimization in Majority-Inverter Graphs

Rudy Lauwereins, Giovanni De Micheli, Mathias Soeken, 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

Towards high-performance polarity-controllable FETs with 2D materials

Giovanni De Micheli, Francky Catthoor, Pierre-Emmanuel Gaillardon, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A Novel High-Gain Amplifier Circuit Using Super-Steep-Subthreshold-Slope Field-Effect Transistors

Pierre-Emmanuel Gaillardon, Patsy Cadareanu, Edouard Giacomin, 2021, 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC).

Read your Circuit: Leveraging Word Embedding to Guide Logic Optimization

Matheus T. Moreira, Pierre-Emmanuel Gaillardon, Cunxi Yu, 2021, 2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC).

Taping out an FPGA in 24 hours with OpenFPGA: The SOFA Project

Pierre-Emmanuel Gaillardon, Ganesh Gore, Xifan Tang, 2021, 2021 31st International Conference on Field-Programmable Logic and Applications (FPL).

Area-Efficient Multiplier Designs Using a 3D Nanofabric Process Flow

Francky Catthoor, Pierre-Emmanuel Gaillardon, Edouard Giacomin, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

SLAP: A Supervised Learning Approach for Priority Cuts Technology Mapping

Pierre-Emmanuel Gaillardon, Cunxi Yu, Walter Lau Neto, 2021, 2021 58th ACM/IEEE Design Automation Conference (DAC).

Invited: Getting the Most out of your Circuits with Heterogeneous Logic Synthesis

Pierre-Emmanuel Gaillardon, Walter Lau Neto, Xifan Tang, 2021, 2021 58th ACM/IEEE Design Automation Conference (DAC).

A Scalable and Robust Hierarchical Floorplanning to Enable 24-hour Prototyping for 100k-LUT FPGAs

Pierre-Emmanuel Gaillardon, Ganesh Gore, Xifan Tang, 2021, ISPD.

multiPULPly

Pierre-Emmanuel Gaillardon, Ronny Ronen, Shahar Kvatinsky, 2021, ACM J. Emerg. Technol. Comput. Syst..

A 12-pA Resolution Sigma Delta ADC Topology for Chemiresistive Sensor-Based Applications

Pierre-Emmanuel Gaillardon, Edouard Giacomin, Matthieu Couriol, 2021, 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC).

Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction pdf

Ramesh Karri, Pierre-Emmanuel Gaillardon, Christian Pilato, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Two-Level Approximate Logic Synthesis Combining Cube Insertion and Removal pdf

Pierre-Emmanuel Gaillardon, Walter Lau Neto, Paulo Butzen, 2022, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Exploring eFPGA-based Redaction for IP Protection

Ramesh Karri, Pierre-Emmanuel Gaillardon, Christian Pilato, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

A Deep Learning Approach to Sensor Fusion Inference at the Edge

Pierre-Emmanuel Gaillardon, Thomas Becnel, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Smart-Redundancy: An Alternative SEU/SET Mitigation Method for FPGAs

Pierre-Emmanuel Gaillardon, Edouard Giacomin, Aurelien Alacchi, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

NEMO-CNN: An Efficient Near-Memory Accelerator for Convolutional Neural Networks

Pierre-Emmanuel Gaillardon, Valerio Tenace, Grant Brown, 2021, 2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Majority Logic Representation and Satisfiability

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Luca Amaru, 2014 .

Effect of O2- migration in Pt/HfO2/Ti/Pt structure

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Maxime Thammasack, 2017, Journal of Electroceramics.

Towards functionality-enhanced devices: Controlling the modes of operation in three-independent-gate transistors

Giovanni De Micheli, Jian Zhang, Pierre-Emmanuel Gaillardon, 2015 .

Top–Down Fabrication of Gate-All-Around Vertically Stacked Silicon Nanowire FETs With Controllable Polarity

Yusuf Leblebici, Giovanni De Micheli, Jian Zhang, 2014, IEEE Transactions on Nanotechnology.

Molecular electronics and reconfigurable logic

Fabien Clermidy, Ian O'Connor, Nacer Abouchi, 2010 .

Doping-Free Complementary Logic Gates Enabled by Two-Dimensional Polarity-Controllable Transistors.

Francky Catthoor, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2018, ACS nano.

Functionality-Enhanced Devices: From Transistors to Circuit-Level Opportunities

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Giovanni V. Resta, 2018, Beyond-CMOS Technologies for Next Generation Computer Design.

Configurable Logic Gates Using Polarity-Controlled Silicon Nanowire Gate-All-Around FETs

Yusuf Leblebici, Giovanni De Micheli, Jian Zhang, 2014, IEEE Electron Device Letters.

Nanoscale Three-Independent-Gate Transistors: Geometric TCAD Simulations at the 10 nm-Node

Pierre-Emmanuel Gaillardon, Patsy Cadareanu, 2019, 2019 IEEE 14th Nanotechnology Materials and Devices Conference (NMDC).

Patterns of distributive environmental inequity under different PM2.5 air pollution scenarios for Salt Lake County public schools.

Pierre-Emmanuel Gaillardon, Miriah D. Meyer, Miriah Meyer, 2020, Environmental research.

Scaling trends and performance evaluation of 2-dimensional polarity-controllable FETs

Francky Catthoor, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2017, Scientific Reports.

Operation regimes and electrical transport of steep slope Schottky Si-FinFETS

Giovanni De Micheli, Jian Zhang, Pierre-Emmanuel Gaillardon, 2017 .

Boolean logic optimization in Majority-Inverter Graphs

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Luca Amaru, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Citizen Scientists Engagement in Air Quality Measurements

Pierre-Emmanuel Gaillardon, Kerry E. Kelly, Pascal Goffin, 2018 .

Nanowire systems: technology and design

Luca Gaetano Amarù, Giovanni De Micheli, Pierre-Emmanuel Gaillardon, 2014, Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences.