Fatih Hamzaoglu

发表

A 32 nm High-k Metal Gate SRAM With Adaptive Dynamic Stability Enhancement for Low-Voltage Operation

Kevin Zhang, Pramod Kolar, Eric Karl, 2011, IEEE Journal of Solid-State Circuits.

Mircea R. Stan, Fatih Hamzaoglu, David Garrett, 2004, Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784).

Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM

Eric Karl, Uddalak Bhattacharya, Fatih Hamzaoglu, 2011, 2011 International Electron Devices Meeting.

Embedded Memories for Silicon-ln-Package: Optimization of Memory Subsystem from loT to Machine Learning

Fatih Hamzaoglu, 2019 .

Session 12 overview: SRAM

Fatih Hamzaoglu, Leland Chang, Chun Shiah, 2017, ISSCC.

A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry

Zheng Guo, John Keane, Eric Karl, 2013, IEEE Journal of Solid-State Circuits.

Circuit-level techniques to control gate leakage for sub-100nm CMOS

Mircea R. Stan, Fatih Hamzaoglu, M. Stan, 2002, ISLPED '02.

A 32nm High-k metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation

Pramod Kolar, Eric Karl, Uddalak Bhattacharya, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

Dual-VT SRAM cells with full-swing single-ended bit line sensing for high-performance on-chip cache in 0.13 μm technology generation

Kevin Zhang, Vivek De, Shekhar Borkar, 2000, ISLPED '00.

Retention time optimization for eDRAM in 22nm tri-gate CMOS technology

Umut Arslan, Nabhendra Bisnik, Shigeki Tomishima, 2013, 2013 IEEE International Electron Devices Meeting.

Multi-phase 1GHz voltage doubler charge-pump in 32nm logic process

Fatih Hamzaoglu, Kevin Zhang, Tanay Karnik, 2009, 2009 Symposium on VLSI Circuits.

A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-Κ Metal-Gate CMOS Technology

Uddalak Bhattacharya, Fatih Hamzaoglu, Yong-Gee Ng, 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process

Fatih Hamzaoglu, Kevin Zhang, Tanay Karnik, 2010, IEEE Journal of Solid-State Circuits.

F2: Memory trends: From big data to wearable devices

Chulwoo Kim, Antoine Dupret, Fatih Hamzaoglu, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

Split-path skewed (SPS) CMOS buffer for high performance and low power applications

Mircea R. Stan, Fatih Hamzaoglu, M. Stan, 2001 .

eNVM MRAM Retention Reliability Modeling in 22FFL FinFET Technology

Fatih Hamzaoglu, Chris Connor, Jeff Hicks, 2019, 2019 IEEE International Reliability Physics Symposium (IRPS).

Embedded Memories for Silicon-In-Package: Optimization of Memory Subsystem from IoT to Machine Learning

Fatih Hamzaoglu, 2019, VLSI-DAT.

Process, Temperature, and Supply-Noise Tolerant 45$~$nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits

Nitin Borkar, Vivek De, Fatih Hamzaoglu, 2009, IEEE Journal of Solid-State Circuits.

An offset-cancelling four-phase voltage sense amplifier for resistive memories in 14nm CMOS

Anantha Chandrakasan, Umut Arslan, Fatih Hamzaoglu, 2017, 2017 IEEE Custom Integrated Circuits Conference (CICC).

A 4.0 GHz 291Mb voltage-scalable SRAM design in 32nm high-κ metal-gate CMOS with integrated power management

Ying Zhang, Kevin Zhang, Pramod Kolar, 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

Session 7 overview: Non-volatile memory solutions: Memory subcommittee

Fatih Hamzaoglu, Takashi Kono, 2015, ISSCC.

Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design

Pramod Kolar, Uddalak Bhattacharya, Fatih Hamzaoglu, 2011, IEEE Design & Test of Computers.

Session 31 overview: Computation in memory for machine learning: Technology directions and memory subcommittees

Naveen Verma, Makoto Nagata, Fatih Hamzaoglu, 2018, ISSCC.

13.3 A 7Mb STT-MRAM in 22FFL FinFET Technology with 4ns Read Sensing Time at 0.9V Using Write-Verify-Write Scheme and Offset-Cancellation Sensing Technique

Pulkit Jain, Fatih Hamzaoglu, Tahir Ghani, 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

A 4.0 GHz 291 Mb Voltage-Scalable SRAM Design in a 32 nm High-k + Metal-Gate CMOS Technology With Integrated Power Management

Ying Zhang, Kevin Zhang, Pramod Kolar, 2010, IEEE Journal of Solid-State Circuits.

13.2 A 3.6Mb 10.1Mb/mm2 Embedded Non-Volatile ReRAM Macro in 22nm FinFET Technology with Adaptive Forming/Set/Reset Schemes Yielding Down to 0.5V with Sensing Time of 5ns at 0.7V

Pulkit Jain, Fatih Hamzaoglu, Liqiong Wei, 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

A 1.1 GHz 12 $\mu$A/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications

Pramod Kolar, Uddalak Bhattacharya, Fatih Hamzaoglu, 2008, IEEE Journal of Solid-State Circuits.

13.1 A 1Gb 2GHz embedded DRAM in 22nm tri-gate CMOS technology

Umut Arslan, Nabhendra Bisnik, Shigeki Tomishima, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology

Swaroop Ghosh, Umut Arslan, Nabhendra Bisnik, 2015, IEEE Journal of Solid-State Circuits.

Advances in Microprocessor Cache Architectures Over the Last 25 Years

Fatih Hamzaoglu, Ramesh Illikkal, Ravi Iyer, 2021, IEEE Micro.

16.2 eDRAM-CIM: Compute-In-Memory Design with Reconfigurable Embedded-Dynamic-Memory Array Realizing Adaptive Data Converters and Charge-Domain Computing

Jaydeep P. Kulkarni, Pulkit Jain, Fatih Hamzaoglu, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

Low-Power SRAMs in Nanoscale

Fatih Hamzaoglu, Kevin Zhang, Yih Wang, 2008 .