S. Moch

HiBRID-SoC: a system-on-chip architecture with two multimedia DSPs and a RISC core

Mladen Berekovic, H.-J. Stolberg, M. B. Kulaczewski, 2003, IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings..

An SoC with two multimedia DSPs and a RISC core for video compression applications

P. Pirsch, L. Friebe, S. Moch, 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

HiBRID-SoC: a multi-core system-on-chip architecture for multimedia signal processing applications

Peter Pirsch, Mladen Berekovic, M. B. Kulaczewski, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

A single-chip video signal processing system with embedded DRAM

Peter Pirsch, K. Herrmann, S. Moch, 2000, 2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528).

HiBRID-SoC: a multi-core SoC architecture for multimedia signal processing

H.-J. Stolberg, M. Berekovic, P. Pirsch, 2003, 2003 IEEE Workshop on Signal Processing Systems (IEEE Cat. No.03TH8682).

HIBRID-SOC: a multi-core architecture for image and video applications

P. Pirsch, L. Friebe, S. Moch, 2003, MEDEA '03.