Bishwajeet Pandey

发表

Voltage scaling based green design on ultra scale FPGA

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2013, 2013 International Conference on Green Computing, Communication and Conservation of Energy (ICGCE).

Energy Conversion in 64-Bit ALU Design on FPGA Using Mechanics of Capacitance

Shayla Islam, Tanesh Kumar, Bishwajeet Pandey, 2014 .

Green ECG Machine Design Using Different Logic Families

Amanpreet Kaur, Bishwajeet Pandey, Sakshi Aggarwal, 2015, 2015 Fifth International Conference on Communication Systems and Network Technologies.

Simulation of HSTL IO standard based energy efficient Punjabi Unicode reader on FPGA

Tanesh Kumar, Gurpreet Singh, Bishwajeet Pandey, 2014, 2014 International Conference on Open Source Systems & Technologies.

WIDE DYNAMIC RANGE TRANIMPEDANCE AMPLIFIER USING PEAKING CAPACITANCE TECHNIQUE FOR HIGH SPEED OPTICAL WIRELESS COMMUNICATION SYSTEM

Bishwajeet Pandey, Bhagwan Das, A. F. Chandio, 2018 .

Different IO standard based energy efficient decoder design for 64-bit processor architecture

Amanpreet Kaur, Bishwajeet Pandey, Shivani Madhok, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

IO Standard Based Low Power Design of RAM and Implementation on FPGA

Manisha Pattanaik, Bishwajeet Pandey, Deepa Singh, 2013 .

Capacitance and frequency scaling based energy efficient image inverter design on FPGA

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2013, 2013 International Conference on Communication and Computer Vision (ICCCV).

Thermal aware energy efficient bengali unicode reader in Text analysis

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2014, 2014 International Conference on Reliability Optimization and Information Technology (ICROIT).

SSTL based green image ALU design on different FPGA

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2013, 2013 International Conference on Green Computing, Communication and Conservation of Energy (ICGCE).

Design of power optimized memory circuit using High Speed Transreceiver Logic IO Standard on 28nm Field Programmable Gate Array

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2014, 2014 International Conference on Reliability Optimization and Information Technology (ICROIT).

Energy-efficient Pseudo Noise generator based optical transmitter for Ethernet(IEEE 802.3az)

M. F. L. Abdullah, Bishwajeet Pandey, Bhagwan Das, 2015, 2015 International Conference on Computer, Communications, and Control Technology (I4CT).

Simulation and Verification of Voltage and Capacitance Scalable 32-bit Wi-Fi Ah Channel Enable ALU Design on 40nm FPGA

Bishwajeet Pandey, Neha Agrawal, Anjan Kumar, 2015, 2015 International Conference on Computational Intelligence and Communication Networks (CICN).

SSTL I/O Standard based environment friendly energyl efficient ROM design on FPGA

Bishwajeet Pandey, D. M. Akbar Hussain, Meenakshi Bansal, 2014, 3rd International Symposium on Environmental Friendly Energies and Applications (EFEA).

LVCMOS I/O standard based million MHz high performance energy efficient design on FPGA

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2013, 2013 International Conference on Communication and Computer Vision (ICCCV).

Thermal aware energy efficient Gurumukhi Unicode reader for natural language processing

Amanpreet Kaur, Gurpreet Singh, Bishwajeet Pandey, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

Input–Output Standard-Based Energy Efficient UART Design on 90 nm FPGA

Bishwajeet Pandey, Vikas Jha, Sweety Dabas, 2018 .

Digitally controlled impedance based green design on ultra scale FPGA

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2013, 2013 International Conference on Green Computing, Communication and Conservation of Energy (ICGCE).

Capacitance scaling based Gurumukhi Unicode reader design for natural language processing

Amanpreet Kaur, Gurpreet Singh, Bishwajeet Pandey, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

Energy efficient design of laser driver using field programming gate array

Bishwajeet Pandey, Bhagwan Das, Mohammad Faiz Liew Abdullah, 2016 .

Different I/O standard based Wi-Fi enable 32-bit ALU design on 90nm FPGA

Bishwajeet Pandey, Neha Agrawal, Anjan Kumar, 2015, 2015 Communication, Control and Intelligent Systems (CCIS).

Energy efficient flip flop design using voltage scaling on FPGA

Amanpreet Kaur, Bishwajeet Pandey, Sunny Singh, 2014, 2014 IEEE 6th India International Conference on Power Electronics (IICPE).

Power optimization of semiconductor laser driver using voltage scaling technique

Bishwajeet Pandey, Mohammad Faiz Liew Abdullah, Qadir Bakhsh, 2015 .

LVCMOS Based Thermal Aware Energy Efficient Vedic Multiplier Design on FPGA

Bishwajeet Pandey, Kavita Goswami, 2014, 2014 International Conference on Computational Intelligence and Communication Networks.

LVDCI I/O standard based green parallel integrator design in green communications on FPGA

Manoj Kumar, Tanesh Kumar, Bishwajeet Pandey, 2016, 2016 3rd International Conference on Computing for Sustainable Global Development (INDIACom).

I/O StandardsBased on Green Communication UsingFibonacci GeneratorDesign on FPGA

Saifur Rahman, Bishwajeet Pandey, Kartik Kalia, 2015 .

HSTL based low power thermal aware adder design on 65nm FPGA

Bishwajeet Pandey, Kartik Kalia, Khyati Nanda, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

Energy efficient vedic multiplier design using LVCMOS and HSTL IO standard

Bishwajeet Pandey, Kavita Goswami, 2014, 2014 9th International Conference on Industrial and Information Systems (ICIIS).

Reduction of I/O power using energy efficient HSTL I/O standard in vedic multiplier on FPGA

Bishwajeet Pandey, Kavita Goswami, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

Simulation of high performance energy efficient human brain on 28nm FPGA

Bishwajeet Pandey, M. F. Alam, S. H. A. Musavi, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

Voltage scaling based low power high performance Vedic multiplier design on FPGA

Bishwajeet Pandey, Kavita Goswami, Kavita Goswami, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

IO Standard based low power memory design and implementation on FPGA

Bishwajeet Pandey, Jagdish Kumar, Ravinder Kaur, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

Thermal and power aware Internet of Things enable RAM design on FPGA

Kanika Garg, Bishwajeet Pandey, Gaurav Verma, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

FPGA Based Low Power ROM Design Using Capacitance Scaling

Bishwajeet Pandey, D. M. Akbar Hussain, Meenakshi Bansal, 2014 .

Low Power High Performance ROM Design on FPGA Using LVDCI I/O Standard

Bishwajeet Pandey, Meenakshi Bansal, Neha Bansal, 2014, 2014 International Conference on Computational Intelligence and Communication Networks.

Simulation of CMOS IO Standard Based Energy Efficient Gurmukhi Unicode Reader on FPGA

Gurpreet Singh, Bishwajeet Pandey, 2014, 2014 International Conference on Computational Intelligence and Communication Networks.

Low Voltage Digitally Controlled Impedance Based Energy Efficient Vedic Multiplier Design on 28nm FPGA

Bishwajeet Pandey, Abhishek Jain, Deepa Singh, 2014, 2014 International Conference on Computational Intelligence and Communication Networks.

Clock gating aware energy efficient Frame buffer design on FPGA

Bishwajeet Pandey, Ekta Walia, 2013, 2013 International Conference on Communication and Computer Vision (ICCCV).

LVCMOS based energy efficient solar charge sensor design on FPGA

Amanpreet Kaur, Bishwajeet Pandey, Anu Singla, 2014, 2014 IEEE 6th India International Conference on Power Electronics (IICPE).

GTL based wireless sensor specific energy efficient ALU design on 65nm FPGA

Bishwajeet Pandey, Kartik Kalia, Khyati Nanda, 2015, 2015 International Conference on Signal Processing, Computing and Control (ISPCC).

Thermal Aware Low Power Universal Asynchronous Receiver Transmitter Design on FPGA

Amanpreet Kaur, Bishwajeet Pandey, Sunny Singh, 2014, 2014 International Conference on Computational Intelligence and Communication Networks.

Design of frame buffer for 1 THz energy efficient digital image processor based on HSLVDCI I/O standard in FPGA

Bishwajeet Pandey, Ekta Walia, Pooja Saigal, 2013, 2013 INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING AND COMMUNICATION (ICSC).

Anatomy and Utilities of an Artificial Intelligence Conversational Entity

Bishwajeet Pandey, Deepa Singh, Anirudh Khanna, 2015, 2015 International Conference on Computational Intelligence and Communication Networks (CICN).

LVCMOS I/O standard based environment friendly low power ROM design on FPGA

Bishwajeet Pandey, Meenakshi Bansal, Neha Bansal, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

LVDCI I/O standard based green image ALU design on ultra scale FPGA

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2013, 2013 IEEE 8th International Conference on Industrial and Information Systems.

Internet of Things Enabled Energy Efficient Green Communication on FPGA

Bishwajeet Pandey, Parminder Kaur, Jagdish Kumar, 2014, 2014 International Conference on Computational Intelligence and Communication Networks.

I/O standard based power optimized processor register design on ultra scale FPGA

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2014, 2014 International Conference on Computing for Sustainable Global Development (INDIACom).

Frequency scaling based thermally tolerable Wi-Fi Enable 32-bit ALU design on 90nm FPGA

Bishwajeet Pandey, Neha Agrawal, Anjan Kumar, 2015, 2015 Communication, Control and Intelligent Systems (CCIS).

Replicating an Energy Efficient Human Brain Using 40nm FPGA Technology

M. F. L. Abdullah, Bishwajeet Pandey, Bhagwan Das, 2015, 2015 International Conference on Computational Intelligence and Communication Networks (CICN).

SSTL I/O standard based green communication using Fibonacci generator design on ultra scale FPGA

Tanesh Kumar, Bishwajeet Pandey, D. M. Akbar Hussain, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

64 bit green ALU design using clock gating technique on ultra scale FPGA

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2013, 2013 International Conference on Green Computing, Communication and Conservation of Energy (ICGCE).

Drive Strength and LVCMOS Based Dynamic Power Reduction of ALU on FPGA

Manisha Pattanaik, Bishwajeet Pandey, Mayank Kumar, 2013 .

GTL IO standards based WLAN specific low power ALU design on FPGA

Bishwajeet Pandey, Shaina Verma, Divya Gaba, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

Ambient Temperature Based Thermal Aware Energy Efficient ROM Design on FPGA

Bishwajeet Pandey, Meenakshi Bansal, Neha Bansal, 2014 .

Capacitance scaling aware power optimized register design and implementation on 28nm FPGA

Bishwajeet Pandey, Sumit Kumar Banshal, S. J. Brenda, 2014, 2014 International Conference on Computer Communication and Informatics.

Energy Efficient Counter Design Using Voltage Scaling on FPGA

Amanpreet Kaur, Bishwajeet Pandey, Gaurav Verma, 2015, 2015 Fifth International Conference on Communication Systems and Network Technologies.

Power optimization of Pseudo Noise based optical transmitter using LVCMOS IO standard

Bishwajeet Pandey, Bhagwan Das, Arslan Kiyani, 2015, 2015 Power Generation System and Renewable Energy Technologies (PGSRET).

Energy Efficient Design of Semiconductor Laser Driver Using Voltage Scaling Technique

Bishwajeet Pandey, Bhagwan Das, Mohammad Faiz Liew Abdullah, 2015 .

Implementation of Power-Efficient Control Unit on Ultra-scale FPGA for Green Communication

Bishwajeet Pandey, Keshav Kumar, Aiza Batool, 2021 .

Lightweight Cryptographic Algorithms for Guessing Attack Protection in Complex Internet of Things Applications

Shayla Islam, Yousef A. Baker El-Ebiary, Bishwajeet Pandey, 2021, Complex..

Power Efficient Model of PWM Generator for Green Computing and Communication on High Performance FPGAs

Bishwajeet Pandey, Keshav Kumar, 2021 .

Temperature control of pseudo noise generator based optical transmitter using airflow and heat sink profile at high speed transceiver logic IO standard

Bishwajeet Pandey, Bhagwan Das, Mohammad Faiz Liew Abdullah, 2016 .

Frequency, Voltage and Temperature Sensor Design for Fire Detection in VLSI Circuit on FPGA

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2013 .

Different Configuration of Low-Power Memory Design Using Capacitance Scaling on 28-nm Field-Programmable Gate Array

Bishwajeet Pandey, Lakshay Rohilla, Alisha Nagpal, 2018 .

Capacitance Based Low Power ALU Design and Implementation on 28nm FPGA

Bishwajeet Pandey, Deepa Singh, Jyotsana Yadav, 2013 .

LVCMOS I/O standard and drive strength based energy efficient design on ultra scale FPGA

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2013, 2013 International Conference on Green Computing, Communication and Conservation of Energy (ICGCE).

Thermal Mechanics Based Energy Efficient FIR Filter for Digital Signal Processing

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2014 .

Mapping Based Low Power Arithmetic and Logic Unit Design with Efficient HDL Coding

Manisha Pattanaik, Bishwajeet Pandey, 2013 .

HSUL based 802.11 WLAN channel specific energy efficient ALU design on FPGA

Bishwajeet Pandey, Shaina Verma, Divya Gaba, 2015, 2015 2nd International Conference on Signal Processing and Integrated Networks (SPIN).