M. Stockinger

Advanced ESD rail clamp network design for high voltage CMOS applications

M. Stockinger, J.W. Miller, 2004, 2004 Electrical Overstress/Electrostatic Discharge Symposium.

Engineering single NMOS and PMOS output buffers for maximum failure voltage in advanced CMOS technologies

M. Stockinger, J.W. Miller, M.G. Khazhinsky, 2004, 2004 Electrical Overstress/Electrostatic Discharge Symposium.

Comprehensive ESD protection for flip-chip products in a dual gate oxide 65nm CMOS technology

M. Stockinger, J.W. Miller, M.G. Khazhinsky, 2006, 2006 Electrical Overstress/Electrostatic Discharge Symposium.

Boosted and distributed rail clamp networks for ESD protection in advanced CMOS technologies

M. Stockinger, J.W. Miller, M.G. Khazhinsky, 2003, 2003 Electrical Overstress/Electrostatic Discharge Symposium.

A novel testing approach for full-chip CDM characterization

E. Rosenbaum, A. Gerdemann, M. Stockinger, 2007, 2007 29th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).

ESD protection for advanced CMOS SOI technologies

M. Stockinger, J.W. Miller, M.G. Khazhinsky, 2005, 2005 Electrical Overstress/Electrostatic Discharge Symposium.

Characterization and modeling of three CMOS diode structures in the CDM to HBM timeframe

M. Stockinger, J.W. Miller, 2006, 2006 Electrical Overstress/Electrostatic Discharge Symposium.

Simulation Based Optimiza-tion Environment and its Application to Semiconductor Devices

Siegfried Selberherr, R. Plasun, M. Stockinger, 1998 .

A Qualitative Study on Optimized MOSFET Doping Profiles

Siegfried Selberherr, R. Plasun, Andreas A. Wild, 1998 .