J.W. Miller

Advanced ESD rail clamp network design for high voltage CMOS applications

M. Stockinger, J.W. Miller, 2004, 2004 Electrical Overstress/Electrostatic Discharge Symposium.

Detection and analysis of ESD-induced melt filaments for FSRAMs

J.W. Miller, M. Prud'homme, 1995, IEEE 1995 International Integrated Reliability Workshop. Final Report.

Study of undoped channel FinFETs in active rail clamp ESD networks

L. Mathew, J.W. Miller, M.G. Khazhinsky, 2008, 2008 IEEE International Reliability Physics Symposium.

Engineering single NMOS and PMOS output buffers for maximum failure voltage in advanced CMOS technologies

M. Stockinger, J.W. Miller, M.G. Khazhinsky, 2004, 2004 Electrical Overstress/Electrostatic Discharge Symposium.

HBM ESD failures caused by a parasitic pre-discharge current spike

T. Meuse, J.W. Miller, H. Marom, 2008, EOS/ESD 2008 - 2008 30th Electrical Overstress/Electrostatic Discharge Symposium.

Comprehensive ESD protection for flip-chip products in a dual gate oxide 65nm CMOS technology

M. Stockinger, J.W. Miller, M.G. Khazhinsky, 2006, 2006 Electrical Overstress/Electrostatic Discharge Symposium.

Boosted and distributed rail clamp networks for ESD protection in advanced CMOS technologies

M. Stockinger, J.W. Miller, M.G. Khazhinsky, 2003, 2003 Electrical Overstress/Electrostatic Discharge Symposium.

ESD protection for advanced CMOS SOI technologies

M. Stockinger, J.W. Miller, M.G. Khazhinsky, 2005, 2005 Electrical Overstress/Electrostatic Discharge Symposium.

Engineering the cascoded NMOS output buffer for maximum V/sub t1/

J.W. Miller, M.G. Khazhinsky, J.C. Weldon, 2000, Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476).

Summary Report: Wafer Level Reliability Testing Discussion Group

J.W. Miller, K.C. Boyko, 1992, International Report on Wafer Level Reliability Workshop.

Wafer Level IC Burn-in As A Step Towards Bir

J.W. Miller, V. Soorholtz, B. Vesquez, 1992, International Report on Wafer Level Reliability Workshop.

Characterization and modeling of three CMOS diode structures in the CDM to HBM timeframe

M. Stockinger, J.W. Miller, 2006, 2006 Electrical Overstress/Electrostatic Discharge Symposium.