Luis Parrilla

发表

Adaptive Cooperation Between Processors in a Parallel Boltzmann Machine

Mancia Anguita, Julio Ortega, Consolación Gil, 1999, IWANN.

Using PVM for Distributed Logic Minimization in a Network of Computers

Luis Parrilla, Julio Ortega, Antonio Lloris-Ruíz, 1999, PVM/MPI.

A new architecture to compute the discrete cosine transform using the quadratic residue number system

Luis Parrilla, Antonio Lloris-Ruíz, Javier Ramírez, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Analysis of RNS-FPL Synergy for High Throughput DSP Applications: Discrete Wavelet Transform

Antonio García, Luis Parrilla, Javier Ramírez, 2000, FPL.

Reconfigurable electronics: Addressing the uncontrolled increase of waste electrical and electronic equipment

Luis Parrilla, Almudena Rivadeneyra, Noel Rodriguez, 2018, Resources, Conservation and Recycling.

Testability of AND-EXOR logic vs. AND-OR logic

Julio Ortega, Luis Parrilla, Antonio Lloris, 1998, 1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196).

Efficient wavelet-based ECG processing for single-lead FHR extraction

Alberto J. Palma, Antonio García, Luis Parrilla, 2013, Digit. Signal Process..

Hardware Activation by Means of PUFs and Elliptic Curve Cryptography in Field-Programmable Devices

Luis Parrilla, Diego P. Morales, Encarnación Castillo, 2016 .

Modified Boltzmann Machine for an Efficient Distributed Implementation

Julio Ortega, Carlos García Puntonet, Luis Parrilla, 1997, IWANN.

IPP@HDL: Efficient Intellectual Property Protection Scheme for IP Cores

Antonio García, Luis Parrilla, Encarnación Castillo, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Ring oscillators as thermal sensors in FPGAs: Experiments in low voltage

Luis Parrilla, Eduardo Boemo, John J León Franco, 2010, 2010 VI Southern Programmable Logic Conference (SPL).

Protection of microprocessor-based cores for FPL devices

Luis Parrilla, Elias Todorovich, Eduardo Boemo, 2010, 2010 VI Southern Programmable Logic Conference (SPL).