Matěj Bartík

Design of a High-Throughput Match Search Unit for Lossless Compression Algorithms

Tomáš Beneš, Pavel Kubalík, Matěj Bartík, 2019, 2019 IEEE 9th Annual Computing and Communication Workshop and Conference (CCWC).

Ultra High Resolution Jitter Measurement Method for Ethernet Based Networks

Tomáš Beneš, Pavel Kubalík, Karel Hynek, 2019, 2019 IEEE 9th Annual Computing and Communication Workshop and Conference (CCWC).

Reverse Engineering of Arrow USB Programmer2 JTAG Adapter for Intel/Altera FPGAs

Matěj Bartík, Matěj Bartík, 2020, 2020 9th Mediterranean Conference on Embedded Computing (MECO).

An Example of PCB Reverse Engineering - Reconstruction of Digilent JTAG SMT3 Schematic

Tomáš Beneš, Karel Hynek, Matěj Bartík, 2019, 2019 IEEE 7th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE).

A low-cost multi-purpose experimental FPGA board for cryptography applications

Matěj Bartík, Jiří Buček, 2016, 2016 IEEE 4th Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE).

High Throughput and Low Latency LZ4 Compressor on FPGA

Tomáš Beneš, Pavel Kubalík, Matěj Bartík, 2019, 2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig).