J.M. Benedetto

Modeling and verification of single event transients in deep submicron technologies

M.J. Gadlage, P.H. Eaton, R.D. Schrimpf, 2004, 2004 IEEE International Reliability Physics Symposium. Proceedings.

HBD layout isolation techniques for multiple node charge collection mitigation

A.F. Witulski, L.W. Massengill, J.D. Black, 2005, IEEE Transactions on Nuclear Science.

Extreme latchup susceptibility in modern commercial-off-the-shelf (COTS) monolithic 1M and 4M CMOS static random-access memory (SRAM) devices

J.M. Benedetto, T.E. Page, 2005, IEEE Radiation Effects Data Workshop, 2005..

Economy-class ion-defying ICs in orbit

J.M. Benedetto, 1998, IEEE Spectrum.

Digital Single Event Transient Trends With Technology Node Scaling

P.H. Eaton, D.G. Mavis, J.M. Benedetto, 2006, IEEE Transactions on Nuclear Science.

Characterization of Digital Single Event Transient Pulse-Widths in 130-nm and 90-nm CMOS Technologies

B. Narasimham, W. T. Holman, B.L. Bhuva, 2007, IEEE Transactions on Nuclear Science.

Comparison of heavy ion and proton induced combinatorial and sequential logic error rates in a deep submicron process

M.J. Gadlage, P.H. Eaton, J.M. Benedetto, 2005, IEEE Transactions on Nuclear Science.

Digital Device Error Rate Trends in Advanced CMOS Technologies

M.J. Gadlage, P.H. Eaton, Vivian Zhu, 2006, IEEE Transactions on Nuclear Science.

Single event transient pulse widths in digital microcircuits

R.D. Schrimpf, M.J. Gadlage, P.H. Eaton, 2004, IEEE Transactions on Nuclear Science.