Y. Akazawa

A monolithic 156 Mb/s clock and data recovery PLL circuit using the sample-and-hold technique

N. Ishihara, Y. Akazawa, 1994 .

60 GHz-bandwidth distributed baseband amplifier IC in a package optimized for isolation

Y. Umeda, Y. Akazawa, S. Kimura, 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

Analysis and application of a novel model for estimating power dissipation of optical interconnections as a function of transmission bit error rate

Taiichi Otsuji, Mikio Yoneyama, Kiyoto Takahata, 1996 .

3.3 V, 5O Mb/s CMOS transceiver for optical burst-mode communication

M. Nakamura, Y. Akahori, Y. Akazawa, 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

A wide-dynamic-range and extremely high-sensitivity CMOS optical receiver IC using feed-forward auto-bias adjustment

H. Kimura, Y. Akazawa, N. Ishihara, 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

A 156 Mbps CMOS clock recovery circuit for burst-mode transmission

Y. Akazawa, N. Ishihara, 1996, 1996 Symposium on VLSI Circuits. Digest of Technical Papers.