Ho-Jin Park

发表

A Study on Architecture and Performance of Service Delivery Platform in Home Networks

Il-Woo Lee, Sang-Ha Kim, Ho-Jin Park, 2006, Parallel and Distributed Computing and Networks.

A 10 b 150 MS/s 123 mW 0.18 /spl mu/m CMOS pipelined ADC

Seung-Hoon Lee, Ho-Jin Park, Sang-Min Yoo, 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

A Study of Authentication methods for the Gateway Management System

Ho-Jin Park, Shinyuk Kang, 2005 .

A 1.1 V 82.3dB audio ΔΣ ADC using asynchronous SAR type quantizer

Ho-Jin Park, Gil-Cho Ahn, Kang-Il Cho, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

A self-calibration 103-dB SNR stereo audio DAC with true-GND class-D headphone drivers in 45nm CMOS

Byeong-Ha Park, Ho-Jin Park, Yong-Hee Lee, 2010, 2010 International SoC Design Conference.

An 8.6 ENOB 900MS/s time-interleaved 2b/cycle SAR ADC with a 1b/cycle reconfiguration for resolution enhancement

Ho-Jin Park, Choong-Hoon Lee, Seung-Tak Ryu, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A 7b 1GS/s 7.2mW nonbinary 2b/cycle SAR ADC with register-to-DAC direct control

Ho-Jin Park, Wan Kim, Seung-Tak Ryu, 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference.

A study on B2C based Electronic Commerce Payment System using the telephone number

Il-Woo Lee, Sang-Ha Kim, Ho-Jin Park, 2003, Proceedings of the Eighth IEEE Symposium on Computers and Communications. ISCC 2003.

The proposal of the home device management mechanism on the heterogeneous residential gateway platform

Ho-Jin Park, Hyung-Seop Hong, Hyungseop Hong, 2004, Communications, Internet, and Information Technology.

A 101-dB SNR hybrid delta-sigma audio ADC using post integration time control

Hae-Seung Lee, Ho-Jin Park, Jae-Whui Kim, 2008, 2008 IEEE Custom Integrated Circuits Conference.

A Proposed Platform & Performance Estimation of Digital-Home Service Delivery/Management Systems

Il-Woo Lee, Sang-Ha Kim, Ho-Jin Park, 2006, Third International Conference on Information Technology: New Generations (ITNG'06).

26.4 A 21fJ/conv-step 9 ENOB 1.6GS/S 2× time-interleaved FATI SAR ADC with background offset and timing-skew calibration in 45nm CMOS

Ho-Jin Park, Seung-Tak Ryu, Yong-Hee Lee, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

An 11mW 100MHz 16X-OSR 64dB-SNDR hybrid CT/DT ΔΣ ADC with relaxed DEM timing

Pavan Kumar Hanumolu, Un-Ku Moon, Ho-Jin Park, 2009, 2009 IEEE Custom Integrated Circuits Conference.

A 10b 150MS/s 123mW 0.18μm CMOS pipelined ADC

Ho-Jin Park, Kyoung-Ho Moon, Seung-Hoon Lee, 2003 .

A high efficiency wide-load-range asynchronous boost converter with time-based dual-mode control for SSD applications

Byeong-Ha Park, Ho-Jin Park, Yoonmyung Lee, 2016, 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A calibration-free 3.0 V 12-bit 20 MSPS A/D converter

Ho-Jin Park, Jae-Whui Kim, Seung-Bin You, 1999, AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360).

Social Networking Service Based on Peer-to-Peer Network

Il-Woo Lee, Ho-Jin Park, Kwang-Roh Park, 2008, 2008 Third International Conference on Systems and Networks Communications.

Multiple-Loop Design Technique for High-Performance Low-Dropout Regulator

Quoc-Hoang Duong, Hyun-Seok Shin, Huy-Hieu Nguyen, 2017, IEEE Journal of Solid-State Circuits.

A 3.3 V 14-bit 10 MSPS calibration-free CMOS pipelined A/D converter

Hee-Cheol Choi, Ho-Jin Park, Jae-Whui Kim, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Performance Evaluation of Workstation System within ATM Integrated Service Switching System using Mean Value Analysis Algorithm

Seung-Ju Jang, Ho-Jin Park, Gil-Yong Kim, 2000 .

A 6 bit 2 GS/s flash-assisted time-interleaved (FATI) SAR ADC with background offset calibration

Ho-Jin Park, Choong-Hoon Lee, Jong-In Kim, 2013, 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A 14-b 30MS/s 0.75mm2 Pipelined ADC with On-Chip Digital Self-Calibration

Hae-Seung Lee, Ho-Young Lee, Ho-Jin Park, 2007, 2007 IEEE Custom Integrated Circuits Conference.

U-Share ServiceStructure Design forEfficient Development ofP2P Applications

Il-Woo Lee, Ho-Jin Park, Sang-Ok Lee, 2007 .

Multiple-loop design technique for high-performance low dropout regulator

Quoc-Hoang Duong, Huy-Hieu Nguyen, Ho-Jin Park, 2016, 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Scenario socket architecture model for ATM switching software

Hoyoung Song, Ho-Jin Park, Han-Kyung Kim, 1996, Proceedings of International Conference on Communication Technology. ICCT '96.

26.7 A 2.6b/cycle-architecture-based 10b 1 JGS/s 15.4mW 4×-time-interleaved SAR ADC with a multistep hardware-retirement technique

Ho-Jin Park, Yong-Hee Lee, Seung-Tak Ryu, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

A Re-configurable 0.5V to 1.2V, 10MS/s to 100MS/s, Low-Power 10b 0.13um CMOS Pipeline ADC

Seung-Hoon Lee, Hee-Cheol Choi, Ho-Jin Park, 2007, 2007 IEEE Custom Integrated Circuits Conference.

A 10b 120MS/s 45nm CMOS ADC using A re-configurable three-stage switched op-amp

Byeong-Ha Park, Seung-Hoon Lee, Kyung-Hoon Lee, 2010, IEEE Custom Integrated Circuits Conference 2010.

A 4mW per-Channel 101dB-DR Stereo Audio DAC with Transformed Quantization Structure

Ho-Jin Park, Yong-Hee Lee, Jae-Whui Kim, 2006, IEEE Custom Integrated Circuits Conference 2006.

Robust approach to determine the optimized illumination condition using process window analysis

Han-Ku Cho, Yong-Jin Chun, Sung-Woo Lee, 2007, Photomask Japan.

A 2W, 92% efficiency and 0.01% THD+N class-D audio power amplifier for mobile applications, based on the novel SCOM architecture

Ho-Young Lee, Jae-Young Shin, Ho-Jin Park, 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).

A 7b 1GS/s 60mW folding ADC in 65nm CMOS

Byeong-Ha Park, Ho-Jin Park, Jungho Lee, 2010, 2010 International SoC Design Conference.

A DLL based 10-320 MHz clock synchronizer

Ho-Jin Park, Sung-Sik Hwang, Jae-Whui Kim, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

A Decision-Error-Tolerant 45 nm CMOS 7b 1 GS/s Nonbinary 2b/Cycle SAR ADC

Ho-Jin Park, Wan Kim, Seung-Tak Ryu, 2015, IEEE Journal of Solid-State Circuits.

Open Software Architecture for Multiservice Switching System

Byung-Sun Lee, Kyung Pyo Jun, Ho-Jin Park, 2001, ICN.

A fully-differential capacitive touch controller with input common-mode feedback for symmetric display noise cancellation

Yoon-Kyung Choi, Gyoocheol Hwang, Kyung-Hoon Lee, 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

A Study of the Legacy Proxy Peer based on P2P Virtual Home Platform

Ho-Jin Park, Taein Hwang, Shinyuk Kang, 2007 .

A 1.5 V 10-bit 25 MSPS pipelined A/D converter

Ho-Jin Park, Jae-Whui Kim, Hee Cheol Choi, 1999, AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360).

Developments and Performance Evaluation of Digital-Home Service Delivery & Management Systems

Il-Woo Lee, Sang-Ha Kim, Ho-Jin Park, 2006, International Conference on Networking, International Conference on Systems and International Conference on Mobile Communications and Learning Technologies (ICNICONSMCL'06).

TDX-1 의 R2 신호방식 처리구조 및 신호정합상 문제점

Ho-Jin Park, 1985 .

A 1.4 V 10-bit 20 MSPS pipelined A/D converter

Hee-Cheol Choi, Ho-Jin Park, Jae-Whui Kim, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Handover Mechanism for Differentiated QoS in High-Speed Portable Internet

Sang-Ho Lee, Ho-Jin Park, Hwa-sung Kim, 2005, ICOIN.

A Study of User Created Sale Contents Management Method Using Peer-to-Peer Technology

Ho-Jin Park, Byeong Thaek Oh, 2007 .

A 9.43-ENOB 160MS/s 1.2V 65nm CMOS ADC based on multi-stage amplifiers

Byeong-Ha Park, Seung-Hoon Lee, Kyung-Hoon Lee, 2009, 2009 IEEE Custom Integrated Circuits Conference.

A 1.8V 8-bit 250Msample/s Nyquist-rate CMOS pipelined ADC

Ho-Young Lee, Ho-Jin Park, Jae-Whui Kim, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

A 1 mW 10-bit 500KSPS SAR A/D converter

Ho-Jin Park, Jae-Whui Kim, Jaejin Park, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

A Peer-to-Peer Service Platform Architecture for Extended Home Services

Il-Woo Lee, Ho-Jin Park, Moon-Ok Choi, 2008, Seventh International Conference on Networking (icn 2008).

Multi-Channel Audio CODEC with Channel Interference Suppression

Ho-Jin Park, Yong-Hee Lee, Bai-Sun Kong, 2015 .

A SchemeUsingOPESforReal-Time Translation Services inDigital HomeNetworks Basedon Delivery Management Systems

Il-Woo Lee, Sang-Ha Kim, Younghwan Choi, 2006 .

A 16b 10MS/s digitally self-calibrated ADC with time constant control

Hae-Seung Lee, Ho-Young Lee, Ho-Jin Park, 2008, 2008 IEEE Custom Integrated Circuits Conference.

8.3 A 200mA digital low-drop-out regulator with coarse-fine dual loop in mobile application processors

Gyu-Hyeong Cho, Kwang-Ho Kim, Ho-Jin Park, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

A new enhanced management approach for heterogeneous service gateways

Ho-Jin Park, Jong-Hoon Lee, 2004, Communications, Internet, and Information Technology.

A 1.3-mW per-channel 103-dB SNR stereo audio DAC with class-D head-phones amplifier in 65nm CMOS

Young-Hyun Jun, Ho-Jin Park, Bai-Sun Kong, 2008, 2008 IEEE Symposium on VLSI Circuits.

A calibration-free 3V 16b 500kS/s 6mW 0.5mm/sup 2/ ADC with 0.13 /spl mu/m CMOS

Hee-Cheol Choi, Ho-Jin Park, Jae-Whui Kim, 2004, 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525).