Ratna Krishnamoorthy

Optimizing and Auto-Tuning Iterative Stencil Loops for GPUs with the In-Plane Method

Stephen John Turner, Weng-Fai Wong, Rick Siow Mong Goh, 2013, 2013 IEEE 27th International Symposium on Parallel and Distributed Processing.

Reducing scheduling overheads in dynamically reconfigurable processors (リコンフィギャラブルシステム)

Ranjani Narayan, Masahiro Fujita, S. K. Nandy, 2010 .

Towards minimizing execution delays on dynamically reconfigurable processors: a case study on REDEFINE

Masahiro Fujita, S. K. Nandy, Ranjani Narayan, 2010, CASES '10.

Spatio-temporal computation on a coarse grained reconfigurable architecture

Masahiro Fujita, S. K. Nandy, Keshavan Varadarajan, 2011 .

Reducing scheduling overheads in dynamically reconfigurable processors (VLSI設計技術)

Ranjani Narayan, Masahiro Fujita, S. K. Nandy, 2010 .

Compiler optimizations for coarse grained reconfigurable architectures (CGRAs)

Ratna Krishnamoorthy, 2011 .

Dataflow Graph Partitioning for Optimal Spatio-Temporal Computation on a Coarse Grain Reconfigurable Architecture

Masahiro Fujita, S. K. Nandy, Ranjani Narayan, 2011, ARC.

Data Flow Graph Partitioning Algorithms and Their Evaluations for Optimal Spatio-temporal Computation on a Coarse Grain Reconfigurable Architecture

Masahiro Fujita, S. K. Nandy, Ranjani Narayan, 2011, IPSJ Trans. Syst. LSI Des. Methodol..

Interconnect-topology independent mapping algorithm for a Coarse Grained Reconfigurable Architecture

Masahiro Fujita, S. K. Nandy, Keshavan Varadarajan, 2011, 2011 International Conference on Field-Programmable Technology.