Steven G. Rothweiler

A transitive closure algorithm for test generation

Vishwani D. Agrawal, Srimat T. Chakradhar, Steven G. Rothweiler, 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Performance optimization of sequential circuits by eliminating retiming bottlenecks

Miodrag Potkonjak, Sujit Dey, Steven G. Rothweiler, 1992, ICCAD.

BECOME: behavior level circuit synthesis based on structure mapping

Jing-Yang Jou, Ruey-Sing Wei, Steven G. Rothweiler, 1988, DAC '88.

Redundancy removal and test generation for circuits with non-Boolean primitives

Srimat T. Chakradhar, Steven G. Rothweiler, S. G. Rothweiler, 1995, Proceedings 13th IEEE VLSI Test Symposium.

Performance optimization of sequential circuits by eliminating retiming bottlenecks

Miodrag Potkonjak, Sujit Dey, Steven G. Rothweiler, 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.

Redundancy removal and test generation for circuits with non-Boolean primitives

Vishwani D. Agrawal, Srimat T. Chakradhar, Steven G. Rothweiler, 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Deriving signal constraints to accelerate sequential test generation

Vijay Gangaram, Srimat T. Chakradhar, Steven G. Rothweiler, 1997, Proceedings Tenth International Conference on VLSI Design.

Bridge: a versatile behavioral synthesis system

Ajoy K. Bose, Chia-Jeng Tseng, Ruey-Sing Wei, 1988, DAC '88.

Sequential Circuit Delay Optimization Using Global Path Delays

Miodrag Potkonjak, Sujit Dey, Srimat T. Chakradhar, 1993, 30th ACM/IEEE Design Automation Conference.