Niranjan M. Devashrayee

Frequency Dependant Bit Appending: An Enhancement to Statistical Codes for Test Data Compression

Usha S. Mehta, Kanker S. Dasgupta, Niranjan M. Devashrayee, 2009, 2009 Annual IEEE India Conference.

Hamming Distance Based 2-D Reordering with Power Efficient Don't Care Bit Filling: Optimizing the test data compression method

Usha S. Mehta, Kanker S. Dasgupta, Niranjan M. Devashrayee, 2010, 2010 International Symposium on System on Chip.

Impact of Technology Scaling on Second Generation Current Conveyors

Niranjan M. Devashrayee, Nilesh K. Patel, Amisha P. Naik, 2010, 2010 International Conference on Advances in Computer Engineering.

Artificial intelligence based scan vector reordering for capture power minimization

Niranjan M. Devashrayee, Usha Sandeep Mehta, Kankar S. Dasgupta, 2011, 2011 Nirma University International Conference on Engineering.

Design of CMOS Low Power Folding and Interpolating Adc

Niranjan M. Devashrayee, Shruti Oza, 2012 .

A Compact Second Generation Current Conveyor(CCII)

Niranjan M. Devashrayee, Amisha P. Naik, 2010, 2010 International Conference on Advances in Recent Technologies in Communication and Computing.

Code Based Test Data Compression for SoC Testing: Optimization of Time, Power and Area Overhead

Kanker S. Dasgupta, Niranjan M. Devashrayee, Usha Mehta, 2012 .

Two Novel Long-Tail Pair Based Second Generation Current Conveyors (CCII)

Niranjan M. Devashrayee, Amisha P. Naik, 2011 .