Tom W. Chen

Measuring routing congestion for multi-layer global routing

Tom W. Chen, Alkan Cengiz, 2000, ACM Great Lakes Symposium on VLSI.

Improving SER Immunity of Combinational Logic Using Combinations of Spatial and Temporal Checking

Tom W. Chen, Alkan Cengiz, Tsau-Shuan Wu, 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

PEER: enriching secondary engineering education through a college summer camp

Tom W. Chen, Justin Gregg, 2005, 2005 IEEE International Conference on Microelectronic Systems Education (MSE'05).

A low cost individual-well adaptive body bias (IWABB) scheme for leakage power reduction and performance enhancement in the presence of intra-die variations

Tom W. Chen, Justin Gregg, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Assessing merged DRAM/Logic technology

Tom W. Chen, Ytong-Bin Kim, 1999, Integr..

A progressive two-stage global routing for macro-cell based designs

Tom W. Chen, Alkan Cengiz, Tom W. Chen, 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

Routing-tree construction with concurrent performance, power and congestion optimization

Tom W. Chen, Alkan Cengiz, Tom W. Chen, 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).

SPECIAL SUPPLEMENT ADVANCES IN PASSIVE OPTICAL NETWORKS

Mario Kolberg, Silvia Giordano, Aiko Pras, 2011 .

Optimization of individual well adaptive body biasing (IWABB) using a multiple objective evolutionary algorithm

Tom W. Chen, Justin Gregg, 2005, Sixth international symposium on quality electronic design (isqed'05).

Post Silicon Power/Performance Optimization in the Presence of Process Variations Using Individual Well-Adaptive Body Biasing

Tom W. Chen, Justin Gregg, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Sen s i tivi ty alysis of Critical Parameters in

Tom W. Chen, 1996 .