Sangseok Kang

A Prevenient Voltage Stress Test Method for High Density Memory

Sungho Kang, Gunbae Kim, Jinseok Lee, 2008, 4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008).

Bit line coupling scheme and electrical fuse circuit for reliable operation of high density DRAM

Jinseok Lee, Byungil Ryu, Sangseok Kang, 2001, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).

A New Wafer Level Latent Defect Screening Methodology for Highly Reliable DRAM Using a Response Surface Method

Sungho Kang, Sunghoon Chun, Junghyun Nam, 2008, 2008 IEEE International Test Conference.