Phillip H. Jones

发表

Characterizing Non-ideal Impacts of Reconfigurable Hardware Workloads on Ring Oscillator-Based Thermometers

Moinuddin Sayed, Phillip H. Jones, 2011, 2011 International Conference on Reconfigurable Computing and FPGAs.

Teaching graphics processing and architecture using a hardware prototyping approach

Phillip H. Jones, Joseph Zambreno, Michael Steffen, 2011, 2011 IEEE International Conference on Microelectronic Systems Education.

An adaptive frequency control method using thermal feedback for reconfigurable hardware applications

John W. Lockwood, Phillip H. Jones, Young H. Cho, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Contemporary Computing - 4th International Conference, IC3 2011, Noida, India, August 8-10, 2011. Proceedings

Sanghamitra Bandyopadhyay, Srinivas Aluru, Bertil Schmidt, 2011, IC3.

An FPGA Architecture for the Recovery of WPA/WPA2 Keys

Phillip H. Jones, Joseph Zambreno, Tyler Johnson, 2015, J. Circuits Syst. Comput..

Changing Output Quality for Thermal Management

John W. Lockwood, Phillip H. Jones, Young H. Cho, 2007, 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007).

A Fault-Aware Toolchain Approach for FPGA Fault Tolerance

Phillip H. Jones, Adwait Gupte, Sudhanshu Vyas, 2015, TODE.

Adaptive Thermoregulation for Applications on Reconfigurable Devices

John W. Lockwood, Phillip H. Jones, Young H. Cho, 2007, 2007 International Conference on Field Programmable Logic and Applications.

Accelerating all-pairs shortest path using a message-passing reconfigurable architecture

Phillip H. Jones, Joseph Zambreno, Kevin Townsend, 2015, 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

A software configurable coprocessor-based state-space controller

Pei Zhang, Phillip H. Jones, Joseph Zambreno, 2015, 2015 25th International Conference on Field Programmable Logic and Applications (FPL).

Scheduling Challenges in Mixed Critical Real-Time Heterogeneous Computing Platforms

Christopher D. Gill, Phillip H. Jones, Ron Cytron, 2013, ICCS.

A Modified Sliding Window Architecture for Efficient BRAM Resource Utilization

Phillip H. Jones, Joseph Zambreno, Murad Qasaimeh, 2017, 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

A software configurable and parallelized coprocessor architecture for LQR control

Pei Zhang, Phillip H. Jones, Joseph Zambreno, 2015, ReConFig.

Use of a soft-core processor in a hardware/software codesign laboratory

John W. Lockwood, Roger D. Chamberlain, Phillip H. Jones, 2005, 2005 IEEE International Conference on Microelectronic Systems Education (MSE'05).

An embedded scalable linear model predictive hardware-based controller using ADMM

Pei Zhang, Phillip H. Jones, Joseph Zambreno, 2017, 2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP).

ParaHist: FPGA Implementation of Parallel Event-Based Histogram for Optical Flow Calculation

Phillip H. Jones, Joseph Zambreno, Mohammad Pivezhandi, 2020, 2020 IEEE 31st International Conference on Application-specific Systems, Architectures and Processors (ASAP).

A Scalable Unsegmented Multiport Memory for FPGA-Based Systems

Phillip H. Jones, Joseph Zambreno, Kevin Townsend, 2015, Int. J. Reconfigurable Comput..

An FPGA-Based Plant-on-Chip Platform for Cyber-Physical System Analysis

Christopher D. Gill, Phillip H. Jones, Ron Cytron, 2014, IEEE Embedded Systems Letters.

Integrating runtime verification into an automated UAS traffic management system

Phillip H. Jones, Kristin Yvonne Rozier, Kristin Y. Rozier, 2020, Innovations in Systems and Software Engineering.

Extracting and Improving Microarchitecture Performance on Reconfigurable Architectures

John W. Lockwood, Roger D. Chamberlain, Phillip H. Jones, 2005, International Journal of Parallel Programming.

Team [Ii][Ss][Uu][0–2]{4} design overview: MEMOCODE 2010 design contest

Aditya Ashok, Moinuddin Sayed, Phillip H. Jones, 2010, Eighth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010).

A high performance systolic architecture for k-NN classification

Phillip H. Jones, Joseph Zambreno, Kevin Townsend, 2014, 2014 Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign (MEMOCODE).

An evaluation of a slice fault aware tool chain

Phillip H. Jones, Adwait Gupte, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

CANSCID-CUDA

Phillip H. Jones, Joseph Zambreno, Michael Steffen, 2010, Eighth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010).

A Reconfigurable Architecture for QR Decomposition Using a Hybrid Approach

Phillip H. Jones, Joseph Zambreno, Xinying Wang, 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.

Hardware-software architecture for priority queue management in real-time and embedded systems

Christopher D. Gill, Phillip H. Jones, Ron Cytron, 2014, Int. J. Embed. Syst..

k-NN text classification using an FPGA-based sparse matrix vector multiplication accelerator

Phillip H. Jones, Joseph Zambreno, Tyler Johnson, 2015, 2015 IEEE International Conference on Electro/Information Technology (EIT).

Improving System Predictability and Performance via Hardware Accelerated Data Structures

Christopher D. Gill, Phillip H. Jones, Ron Cytron, 2012, ICCS.

An FPGA-based Hardware Accelerator for Iris Segmentation

Phillip H. Jones, Joseph Zambreno, Joe Avey, 2018, 2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

Cross-functional Team Course Design Project in Engineering

Mani Mina, Phillip H. Jones, Nicholas D. Fila, 2020 .

CyGraph: A Reconfigurable Architecture for Parallel Breadth-First Search

Phillip H. Jones, Joseph Zambreno, Tyler Johnson, 2014, 2014 IEEE International Parallel & Distributed Processing Symposium Workshops.

Design and evaluation of a delay-based FPGA Physically Unclonable Function

Phillip H. Jones, Joseph Zambreno, Michael Patterson, 2012, 2012 IEEE 30th International Conference on Computer Design (ICCD).

Introducing Autonomy in an Embedded Systems Course Project

Mani Mina, Phillip H. Jones, Nicholas D. Fila, 2020, 2020 IEEE Frontiers in Education Conference (FIE).

Evidence-based planning to broaden the participation of women in electrical and computer engineering

Mani Mina, Phillip H. Jones, Joseph Zambreno, 2016, 2016 IEEE Frontiers in Education Conference (FIE).

Towards Hardware Support for Common Sensor Processing Tasks

Phillip H. Jones, Adwait Gupte, 2009, 2009 15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications.

Analyzing the Energy-Efficiency of Vision Kernels on Embedded CPU, GPU and FPGA Platforms

Phillip H. Jones, Kristof Denolf, Joseph Zambreno, 2019, 2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

Hardware architectural support for control systems and sensor processing

Christopher D. Gill, Phillip H. Jones, Ron Cytron, 2013, TECS.

A project-based embedded systems design course using a reconfigurable SoC platform

Phillip H. Jones, Joseph Zambreno, Daniel Roggow, 2015, 2015 IEEE International Conference on Microelectronics Systems Education (MSE).

Circumventing a ring oscillator approach to FPGA-based hardware Trojan detection

Phillip H. Jones, Joseph Zambreno, Tim Meyer, 2011, 2011 IEEE 29th International Conference on Computer Design (ICCD).

A Reconfigurable Architecture for the Detection of Strongly Connected Components

Phillip H. Jones, Joseph Zambreno, Kevin Townsend, 2016, ACM Trans. Reconfigurable Technol. Syst..

Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads

John W. Lockwood, Phillip H. Jones, Young H. Cho, 2007, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07).

Benchmarking vision kernels and neural network inference accelerators on embedded platforms

Phillip H. Jones, Kristof Denolf, Joseph Zambreno, 2020, J. Syst. Archit..

Cache design for mixed criticality real-time systems

Christopher D. Gill, Phillip H. Jones, Ron Cytron, 2014, 2014 IEEE 32nd International Conference on Computer Design (ICCD).

A software configurable and parallelized coprocessor architecture for LQR control

Pei Zhang, Phillip H. Jones, Joseph Zambreno, 2015, 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

An I/O Bandwidth-Sensitive Sparse Matrix-Vector Multiplication Engine on FPGAs

Phillip H. Jones, Joseph Zambreno, Song Sun, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

Cycle-Accurate Microarchitecture Performance Evaluation

John W. Lockwood, Roger D. Chamberlain, Phillip H. Jones, 2006 .

Hotspot Mitigation Using Dynamic Partial Reconfiguration for Improved Performance

Phillip H. Jones, Adwait Gupte, 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

Parameterizable FPGA-Based Kalman Filter Coprocessor Using Piecewise Affine Modeling

Phillip H. Jones, Joseph Zambreno, Aaron Mills, 2016, 2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

Shepard: A fast exact match short read aligner

Phillip H. Jones, Joseph Zambreno, Chad Nelson, 2012, Tenth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMCODE2012).

A Runtime Configurable Hardware Architecture for Computing Histogram-Based Feature Descriptors

Phillip H. Jones, Joseph Zambreno, Murad Qasaimeh, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

RAMPS: A Reconfigurable Architecture for Minimal Perfect Sequencing

Phillip H. Jones, Joseph Zambreno, Chad Nelson, 2016, IEEE Transactions on Parallel and Distributed Systems.

ARMOR: A Recompilation and Instrumentation-Free Monitoring Architecture for Detecting Memory Exploits

Phillip H. Jones, Joseph Zambreno, Alex Grieve, 2018, IEEE Transactions on Computers.

Embedding Online Runtime Verification for Fault Disambiguation on Robonaut2

Phillip H. Jones, Joseph Zambreno, Pei Zhang, 2020, FORMATS.

A Thermal Management and Profiling Method for Reconfigurable Hardware Applications

John W. Lockwood, Phillip H. Jones, Young H. Cho, 2006, 2006 International Conference on Field Programmable Logic and Applications.

HW/SW Configurable LQG Controller using a Sequential Discrete Kalman Filter

Phillip H. Jones, Joseph Zambreno, Matthew Cauwels, 2018, 2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

Changing Output Quality for Thermal Management

John W. Lockwood, Phillip H. Jones, James Moscola, 2007 .

A Configurable Architecture for Sparse LU Decomposition on Matrices with Arbitrary Patterns

Phillip H. Jones, Joseph Zambreno, Xinying Wang, 2016, CARN.

Liquid architecture

John W. Lockwood, Phillip H. Jones, Ron Cytron, 2004, 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings..

An Efficient Hardware Architecture for Sparse Convolution using Linear Feedback Shift Registers

Phillip H. Jones, Joseph Zambreno, Murad Qasaimeh, 2021, 2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Optimizing application performance using temperature feedback

Phillip H. Jones, 2008 .

Project Title : An Adaptive Property-Aware HW / SW Framework for DDDAS Award Number : FA 9550-11-1-0343 Start Date : 09 / 30 / 2011 Reporting Period : 09 / 30 / 2011 – 04 / 30 / 2014 Program

Phillip H. Jones, 2014 .

A Performance Model for a Thermally Adaptive Application Implemented in Reconfigurable HW

Phillip H. Jones, 2006 .

VLSI Design 2007 Best Paper Awards Prof. Arun Kumar Chaudhury Best Paper Award (Tie between two papers)

Vishwani D. Agrawal, John W. Lockwood, Bharadwaj Amrutur, 2007 .

Design and implementation of an H∞ controller for a quadrotor helicopter

Phillip H. Jones, Nicola Elia, Phillip Jones, 2013, 21st Mediterranean Conference on Control and Automation.

Comparing Energy Efficiency of CPU, GPU and FPGA Implementations for Vision Kernels

Phillip H. Jones, Kristof Denolf, Joseph Zambreno, 2019, 2019 IEEE International Conference on Embedded Software and Systems (ICESS).

Riding the Wave of Change in Electrical and Computer Engineering

Ashfaq A. Khokhar, Mani Mina, Phillip H. Jones, 2017 .

The Effects of an ARMOR-based SIFT environment on the performance and dependability of user applications

Ravishankar K. Iyer, Zbigniew T. Kalbarczyk, Raphael R. Some, 2004, IEEE Transactions on Software Engineering.

Cycle-Accurate Microarchitecture Performance Profiling

John W. Lockwood, Roger D. Chamberlain, Phillip H. Jones, 2005 .