Adonios Thanailakis

发表

A Parallel Skeletonization Algorithm Based on Two-Dimensional Cellular Automata and its VLSI Implementation

Panagiotis Tzionas, Philippos Tsalides, Adonios Thanailakis, 1995, Real Time Imaging.

Data memory power optimization and performance exploration of embedded systems for implementing motion estimation algorithms

Antonios Argyriou, Dimitrios Soudris, Minas Dasygenis, 2003, Real Time Imaging.

Designing Heterogeneous FPGAs with Multiple SBs

Dimitrios Soudris, Stylianos Mamagkakis, Adonios Thanailakis, 2007, ARC.

Power, performance and area exploration of block matching algorithms mapped on programmable processors

Antonios Argyriou, Dimitrios Soudris, Minas Dasygenis, 2001, Proceedings 2001 International Conference on Image Processing (Cat. No.01CH37205).

FPGA Architecture Design and Toolset for Logic Implementation

Dimitrios Soudris, Stilianos Siskos, Spiridon Nikolaidis, 2003, PATMOS.

A CAD System for Modeling and Simulation of Computer Networks Using Cellular Automata

Georgios Ch. Sirakoulis, Adonios Thanailakis, Ioannis Karafyllidis, 2008, IEEE Transactions on Systems, Man, and Cybernetics, Part C (Applications and Reviews).

Designing Alternative FPGA Implementations Using Spatial Data from Hardware Resources

Dimitrios Soudris, Adonios Thanailakis, Kostas Siozios, 2006, PATMOS.

Efficient Power Management Strategy of FPGAs Using a Novel Placement Technique

Dimitrios Soudris, Adonios Thanailakis, Kostas Siozios, 2006, 2006 IFIP International Conference on Very Large Scale Integration.

2-Dimensional minimum cost path planning using a cellular automaton architecture

Panagiotis Tzionas, Philippos Tsalides, Adonios Thanailakis, 1993, Integr..

An integrated FPGA design framework: custom designed FPGA platform and application mapping toolset development

Dimitrios Soudris, Stilianos Siskos, Spiridon Nikolaidis, 2004, 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings..

Non-linear Hybrid Cellular Automata as Pseudorandom Pattern Generators for VLSI Systems

Ioannis Andreadis, Philippos Tsalides, Adonios Thanailakis, 1998, VLSI Design.

Power Optimization Methdology for Multimedia Applications Implementation on Reconfigurable Platforms

Dimitrios Soudris, Kostas Masselos, Adonios Thanailakis, 2003, PATMOS.

Memory power optimization of hardware implementations of multimedia applications onto FPGA platforms

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2005, J. Embed. Comput..

A fast and accurate delay dependent method for switching estimation of large combinational circuits

Dimitrios Soudris, George Theodoridis, Constantinos E. Goutis, 2002, J. Syst. Archit..

A new hardware module for automated visual inspection based on a cellular automaton architecture

Ioannis Andreadis, Panagiotis Tzionas, Philippos Tsalides, 1996, J. Intell. Robotic Syst..

Low-power design of array architectures

Dimitrios Soudris, G. Theodoridis, Adonios Thanailakis, 1996, Proceedings of Third International Conference on Electronics, Circuits, and Systems.

A novel methodology for designing high-performance and low-power FPGA interconnection targeting DSP applications

Dimitrios Soudris, Adonios Thanailakis, Kostas Siozios, 2006, 2006 IEEE International Symposium on Circuits and Systems.

A fault-tolerant message passing algorithm and its hardware implementation

Georgios Ch. Sirakoulis, Philippos Tsalides, Adonios Thanailakis, 2005, Adv. Eng. Softw..

Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2006, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium.

Design and VLSI implementation of a new ASIC for colour measurement

Adonios Thanailakis, I. Andreadis, P. Iliades, 1995 .

Designing a General-Purpose Interconnection Architecture for Field Programmable Gate Arrays

Dimitrios Soudris, Adonios Thanailakis, Kostas Siozios, 2008, J. Low Power Electron..

Design and VLSI implementation of a pattern classifier using pseudo 2D cellular automata

Panagiotis Tzionas, Adonios Thanailakis, Ph. Tsalides, 1992 .

Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications

Erik Brockmeyer, Francky Catthoor, Dimitrios Soudris, 2004, SAMOS.

Geometrical Shape Recognition Using a Cellular Automaton Architecture and its VLSI Implementation

Philippos Tsalides, Adonios Thanailakis, Ioannis Karafyllidis, 1997, Real Time Imaging.

A hybrid cellular automaton/neural network classifier for multi-valued patterns and its VLSI implementation

Panagiotis Tzionas, Philippos Tsalides, Adonios Thanailakis, 1996, Integr..

Designing Low Power Direct Digital Frequency Synthesizers

Dimitrios Soudris, Christos S. Koukourlis, Adonios Thanailakis, 2003, VLSI-SOC.

A Novel Allocation Methodology for Partial and Dynamic Bitstream Generation for FPGA Architectures

Dimitrios Soudris, Adonios Thanailakis, Kostas Siozios, 2010, J. Circuits Syst. Comput..

Systematic methodology for exploration of performance - Energy trade-offs in network applications using Dynamic Data Type refinement

Francky Catthoor, David Atienza, Dimitrios Soudris, 2007, J. Syst. Archit..

A Modified Spiral Search Algorithm and its Embedded Hardware Implementation

Dimitrios Soudris, Minas Dasygenis, Nikolas Kroupis, 2005, IEC.

Design methodology for systematic derivation of fault-tolerant processor array architectures

Dimitrios Soudris, Constantinos E. Goutis, E. D. Kyriakis-Bitzaros, 1998 .

A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

A combined DMA and application-specific prefetching approach for tackling the memory latency bottleneck

Erik Brockmeyer, Francky Catthoor, Dimitrios Soudris, 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An intelligent image sensor based on two-dimensional cellular automata

Adonios Thanailakis, P. J. Hicks, Ph. Tsalides, 1989, Proceedings. VLSI and Computer Peripherals. COMPEURO 89.

Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2003, FPL.

A memory hierarchical layer assigning and prefetching technique to overcome the memory performance/energy bottleneck

Erik Brockmeyer, Francky Catthoor, Dimitrios Soudris, 2005, Design, Automation and Test in Europe.

Architecture design of a coarse-grain reconfigurable multiply-accumulate unit for data-intensive applications

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2007, Integr..

A new adiabatic technique for designing low power array architectures

Ioannis G. Karafyllidis, Dimitrios Soudris, Adonios Thanailakis, 1999, ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357).

A Full-Adder-Based Methodology for the Design of Scaling Operation in Residue Number System

Dimitrios Soudris, Minas Dasygenis, Adonios Thanailakis, 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors

Antonios Argyriou, Dimitrios Soudris, Minas Dasygenis, 2006, J. VLSI Signal Process..

A methodology for the behavioral-level event-driven power management of digital receivers

Dimitrios Soudris, Constantinos E. Goutis, Adonios Thanailakis, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

A methodology for VLSI implementation of Cellular Automata algorithms using VHDL

Ioannis G. Karafyllidis, Adonios Thanailakis, G. Ch. Sirakoulis, 2001 .

Cell-based design of a VLSI cellular sorter

E. D. Adamides, Adonios Thanailakis, Philippos Tsalides, 1991, [1991 Proceedings] 6th Mediterranean Electrotechnical Conference.

Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2004, WWIC.

Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications

Antonios Argyriou, Dimitrios Soudris, Minas Dasygenis, 2000, PATMOS.

Design methodology for the implementation of multidimensional circular convolution

Vassilis Paliouras, Thanos Stouraitis, Dimitrios Soudris, 1997 .

A cellular automaton for the propagation of circular fronts and its applications

Georgios Ch. Sirakoulis, Adonios Thanailakis, Ioannis Karafyllidis, 2005, Eng. Appl. Artif. Intell..

Group Properties of Cellular Automata and VLSI Applications

Howard C. Card, Adonios Thanailakis, Werner Pries, 1986, IEEE Transactions on Computers.

A CAD TOOL FOR AUTOMATIC GENERATION OF RNS & QRNS CONVERTERS

Dimitrios Soudris, Adonios Thanailakis, M. Dasigenis, 2001 .

DAGGER: a novel generic methodology for FPGA bitstream generation and its software tool implementation

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

Genetic partitioning and placement for VLSI circuits

Ioannis G. Karafyllidis, Adonios Thanailakis, G. C. Sipakoulis, 1999, ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357).

A reusable IP FFT core for DSP applications

Dimitrios Soudris, Kostas Masselos, Adonios Thanailakis, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2005, WWIC.

A novel methodology for designing high-performance and low-energy FPGA routing architecture

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2006, FPGA '06.

A low-energy FPGA: architecture design and software-supported design flow

Dimitrios Soudris, Adonios Thanailakis, Kostas Siozios, 2005, International Conference on Field Programmable Logic and Applications, 2005..

A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications

Dimitrios Soudris, Stilianos Siskos, Spiridon Nikolaidis, 2005, IEICE Trans. Inf. Syst..

Design and VLSI implementation of a real-time histogram generator

Ioannis Andreadis, Adonios Thanailakis, Ph. Tsalides, 1993 .

Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size

Dimitrios Soudris, Christos S. Koukourlis, Adonios Thanailakis, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

A cellular automaton model for the study of DNA sequence evolution

Georgios Ch. Sirakoulis, Philippos Tsalides, Adonios Thanailakis, 2003, Comput. Biol. Medicine.

A model for predicting forest fire spreading using cellular automata

Ioannis G. Karafyllidis, Adonios Thanailakis, I. Karafyllidis, 1997 .

A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2004, FPL.

A CAD system for the construction and VLSI implementation of Cellular Automata algorithms using VHDL

Georgios Ch. Sirakoulis, Adonios Thanailakis, Ioannis Karafyllidis, 2003, Microprocess. Microsystems.

Collision-free path planning for a diamond-shaped robot using two-dimensional cellular automata

Panagiotis Tzionas, Philippos Tsalides, Adonios Thanailakis, 1997, IEEE Trans. Robotics Autom..

Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications

Francky Catthoor, David Atienza, Dimitrios Soudris, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Cellular automata-based collision-free robot path planning

Panagiotis Tzionas, Adonios Thanailakis, Phillippos G. Tsalides, 1995, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair.

Systematic methodology for designing low power direct digital frequency synthesisers

Dimitrios Soudris, Christos S. Koukourlis, Adonios Thanailakis, 2007, IET Circuits Devices Syst..

Hierarchical Cellular Graph Automata as a Novel Architecture for Computer-Supported Cooperative Work

Philippos Tsalides, Adonios Thanailakis, Emmanuel D. Adamides, 1992, Comput. J..

A full adder based methodology for scaling operation in residue number system

Dimitrios Soudris, Minas Dasygenis, Adonios Thanailakis, 2002, 9th International Conference on Electronics, Circuits and Systems.

A Novel Division Algorithm and Architectures for Parallel and Sequential Processing

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2005, J. Circuits Syst. Comput..

An efficient algorithm for the largest empty figure problem based on a 2D cellular automaton architecture

Panagiotis Tzionas, Philippos Tsalides, Adonios Thanailakis, 1997, Image Vis. Comput..

Three-dimensional minimum-cost path planning using cellular automata architectures

Panagiotis Tzionas, Adonios Thanailakis, Phillippos G. Tsalides, 1993, Other Conferences.

Designing RNS and QRNS full adder based converters

Dimitrios Soudris, Minas Dasygenis, Adonios Thanailakis, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

A cellular automaton for the determination of the mean velocity of moving objects and its VLSI implementation

Panagiotis Tzionas, Philippos Tsalides, Adonios Thanailakis, 1996, Pattern Recognit..

Hierarchical Cellular Automata structures

Philippos Tsalides, Adonios Thanailakis, Emmanuel Adamides, 1992, Parallel Comput..

Two-Dimensional Cellular Automata: Properties and Applications of a New VLSI Architecture

Philippos Tsalides, Adonios Thanailakis, Nikos Pitsianis, 1992, Comput. J..

Voltage-Mode Multiple-Valued Logic Adder Circuits

Dimitrios Soudris, Adonios Thanailakis, Ioannis M. Thoidis, 2004 .

New algorithm for three-dimensional minimum cost path planning and its VLSI implementation by means of a three-dimensional cellular automata architecture

Panagiotis Tzionas, Adonios Thanailakis, Phillippos G. Tsalides, 1993 .

Cellular automata based minimum cost path estimation on binary maps

Adonios Thanailakis, P. Tzionas, Ph. Tsalides, 1992 .

An integrated framework for architecture level exploration of reconfigurable platform

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2005, International Conference on Field Programmable Logic and Applications, 2005..

A cellular automaton methodology for the simulation of integrated circuit fabrication processes

Georgios Ch. Sirakoulis, Adonios Thanailakis, Ioannis Karafyllidis, 2002, Future Gener. Comput. Syst..

A CAD tool for architecture level exploration and automatic generation of RNS converters

Dimitrios Soudris, Minas Dasygenis, Adonios Thanailakis, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Bit-serial VLSI sorter with high reliability specifications

Philippos Tsalides, Adonios Thanailakis, Emmanuel Adamides, 1994, Microprocess. Microprogramming.

Reducing memory fragmentation in network applications with dynamic memory allocators optimized for performance

Francky Catthoor, David Atienza, Dimitrios Soudris, 2006, Comput. Commun..

A modified spiral search motion estimation algorithm and its embedded system implementation

Dimitrios Soudris, Minas Dasygenis, Nikolas Kroupis, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Improving the Memory Bandwidth Utilization Using Loop Transformations

Erik Brockmeyer, Francky Catthoor, Dimitrios Soudris, 2005, PATMOS.

Cellular logic bus arbitration

E. D. Adamides, Adonios Thanailakis, Ph. Tsalides, 1993 .

AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow

Dimitrios Soudris, Stilianos Siskos, Spiridon Nikolaidis, 2005, ASP-DAC.

Cellular-automata-based learning network for pattern recognition

Panagiotis Tzionas, Adonios Thanailakis, Phillippos G. Tsalides, 1991, Other Conferences.

The VLSI implementation of a baseband receiver for DECT-based portable applications

Thanos Stouraitis, Dimitrios Soudris, Constantinos E. Goutis, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Substrate current and degradation of n-channel polycrystalline silicon thin-film transistors

Adonios Thanailakis, C. A. Dimitriadis, N. A. Hastas, 2005, Microelectron. Reliab..

Algebraic Theory of Bounded One-dimensional Cellular Automata

Howard C. Card, Philippos Tsalides, Adonios Thanailakis, 1989, Complex Syst..

Synchronization of D. Parkinsonasynchronous concurrent processes using cellular automata

Philippos Tsalides, Adonios Thanailakis, Emmanuel Adamides, 1989, Parallel Comput..

Design and simulation of a nanoelectronic single-electron universal Control-Control-Not gate

Adonios Thanailakis, Ioannis Karafyllidis, Ioannis Tsimperidis, 2004, Microelectron. J..

Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations

Dimitrios Soudris, Kostas Masselos, Adonios Thanailakis, 2002, FPL.

The circuit design of multiple-valued logic voltage-mode adders

Dimitrios Soudris, Adonios Thanailakis, J. M. Fernandez, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Multiple-valued logic voltage-mode storage circuits based on true-single-phase clocked logic

Thanos Stouraitis, Dimitrios Soudris, Adonios Thanailakis, 1998, Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222).

A new, cellular automaton-based, nearest neighbor pattern classifier and its VLSI implementation

Panagiotis Tzionas, Philippos Tsalides, Adonios Thanailakis, 1994, IEEE Trans. Very Large Scale Integr. Syst..

Loss-of-load probability and related parameters in optimum computer-aided design of stand-alone photovoltaic systems

Adonios Thanailakis, Ph. Tsalides, 1986 .

Design methodology of multiple-valued logic voltage-mode storage circuits

Thanos Stouraitis, Ioannis G. Karafyllidis, Dimitrios Soudris, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

Simulation of deposition-topography granular distortion for TCAD

Ioannis G. Karafyllidis, Adonios Thanailakis, Nikolaos Georgoulas, 1998 .

The influence of metal work function on electrical properties of metal/ a-SiC:H Schottky diodes

Adonios Thanailakis, L. Magafas, Nikolaos Georgoulas, 1997 .

Study of lithography profiles developed on non-planar Si surfaces

Ioannis G. Karafyllidis, Adonios Thanailakis, G. Ch. Sirakoulis, 1999 .

Electrical properties of a-SiC/c-Si(p) heterojunctions

Adonios Thanailakis, L. Magafas, Nikolaos Georgoulas, 1992 .

VLSI implementation of mod-p multipliers using homomorphisms and hybrid cellular automata

Adonios Thanailakis, T. A. York, P. J. Hicks, 1992 .

Simulation of two-dimensional photoresist etching process in integrated circuit fabrication using cellular automata

Ioannis G. Karafyllidis, Adonios Thanailakis, 1995 .

A new simulator for the oxidation process in integrated circuit fabrication based on cellular automata

Ioannis G. Karafyllidis, Dimitrios Soudris, Adonios Thanailakis, 1999 .

Study of the effects of photoresist surface roughness and defects on developed profiles

Ioannis G. Karafyllidis, Adonios Thanailakis, G. Ch. Sirakoulis, 2000 .

Design and VLSI implementation of mod-127 multiplier using cellular automaton-based data compression techniques

Adonios Thanailakis, T. A. York, P. J. Hicks, 1991 .

New a-Si/c-Si and a-SiC/c-Si based optically controlled switching devices

Adonios Thanailakis, Nikolaos Georgoulas, D. Girginoudi, 1995 .

Study of the effect of non-planarity and defects on the geometrical accuracy of semiconductor surface structures using a CA_TCAD system

Ioannis G. Karafyllidis, Adonios Thanailakis, G. Ch. Sirakoulis, 2001 .

A model for electrical tree growth in solid insulating materials using cellular automata

Ioannis G. Karafyllidis, Adonios Thanailakis, Michael G. Danikas, 1996, Conference Record of the 1996 IEEE International Symposium on Electrical Insulation.

Deterministic one-dimensional cellular automata

Howard C. Card, Adonios Thanailakis, Nikos P. Pitsianis, 1989 .

A modified discrete Fourier-cosine transform algorithm and its VLSI implementation

Panagiotis Tzionas, Philippos Tsalides, Adonios Thanailakis, 1994, Microprocess. Microsystems.

Neural networks for the simulation of photoresist exposure process in integrated circuit fabrication

Ioannis G. Karafyllidis, Dimitrios Soudris, Adonios Thanailakis, 1997 .

Reversible and irreversible effects on the electrical characteristics of new high-speed aSi and aSiC switches

Adonios Thanailakis, Nikolaos Georgoulas, E. I. Dimitriadis, 1998 .

Simulation of electrical tree growth in solid dielectrics containing voids of arbitrary shape

Ioannis G. Karafyllidis, Adonios Thanailakis, Michael G. Danikas, 1996 .

The design of low power multiple-valued logic encoder and decoder circuits

Ioannis G. Karafyllidis, Dimitrios Soudris, Adonios Thanailakis, 1999, ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357).

Structural and optical properties of a-SiC:H thin films

Adonios Thanailakis, L. Magafas, Nikolaos Georgoulas, 1992 .

Quaternary voltage-mode CMOS circuits for multiple-valued logic

Ioannis G. Karafyllidis, Dimitrios Soudris, Adonios Thanailakis, 1998 .

Direct computation of the array optimum tilt angle in constant-tilt photovoltaic systems

Adonios Thanailakis, A. Thanailakis, Ph. Tsalides, 1985 .

VLSI methodology for the design of RNS and QRNS full adder based converters

Dimitrios Soudris, Minas Dasygenis, Adonios Thanailakis, 2002 .

The a-SiC/c-Si(n) Isotype Heterojunction as a High Sensitivity Temperature Sensor

Adonios Thanailakis, L. Magafas, Nikolaos Georgoulas, 1998 .

The Dependence of Electrical and Optical Properties of RF Sputtered Amorphous Silicon–Carbon Alloy Thin Films on Substrate Temperature and Hydrogen Flow Rate

Adonios Thanailakis, L. Magafas, Nikolaos Georgoulas, 1991 .

Simulation of the image reversal submicron process in integrated circuit fabrication

Ioannis G. Karafyllidis, Adonios Thanailakis, 1996 .