Seungjun Shin

23.1 A 7.5Gb/s/pin LPDDR5 SDRAM With WCK Clocking and Non-Target ODT for High Speed and With DVFS, Internal Data Copy, and Deep-Sleep Mode for Low Power

Sukhyun Lim, Jin-Hun Jang, Dukha Park, 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

Bootstrapping Spatial Median for Location Problems

Myoungshic Jhun, Seungjun Shin, M. Jhun, 2009, Commun. Stat. Simul. Comput..

Developing ISO 14649-based conversational programming system for multi-channel complex machine tools

Jumyung Um, Suk-Hwan Suh, Dae-Hyuck Chung, 2009, Int. J. Comput. Integr. Manuf..

Reincarnation of G-code based part programs into STEP-NC for turning applications

Suk-Hwan Suh, Ian Stroud, Seungjun Shin, 2007, Comput. Aided Des..

STEP-compliant CNC system for turning: Data model, architecture, and implementation

Suk-Hwan Suh, Byeong-Eon Lee, Dae-Hyuck Chung, 2006, Comput. Aided Des..

23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme

Jonghyuk Kim, Hoon Lee, Young Choi, 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

Process-oriented Life Cycle Assessment framework for environmentally conscious manufacturing

Suk-Hwan Suh, Ian Stroud, Seungjun Shin, 2017, J. Intell. Manuf..

Multistage Fusion With Dissimilarity Regularization for SAR/IR Target Recognition

Woo-Jin Song, Young-Rae Cho, Kyeongbo Kong, 2019, IEEE Access.