Morio Ikesaka

Architecture of highly parallel ap1000 computer

Hiroaki Ishihata, Toshiyuki Shimizu, Takeshi Horie, 1993, Systems and Computers in Japan.

A Highly Parallel Processor CAP

Hiroaki Ishihata, Morio Ikesaka, Mitsuo Ishii, 1990, Systems and Computers in Japan.

System for transferring control between parallel computers

Hiroaki Ishihata, Takeshi Horie, Morio Ikesaka, 1990 .

Cellular array processor CAP and applications

Hiroyuki Sato, Hiroaki Ishihata, Morio Ikesaka, 1989, J. VLSI Signal Process..

AP1000 Architecture and Performance of LU Decomposition

Hiroaki Ishihata, Takeshi Horie, Satoshi Inano, 1991, International Conference on Parallel Processing.

Design and Implementation of an Interconnection Network for the AP1000

Hiroaki Ishihata, Takeshi Horie, Morio Ikesaka, 1992, IFIP Congress.

Fast image generation of construcitve solid geometry using a cellular array processor

Hiroyuki Sato, Keiji Sato, Hiroaki Ishihata, 1985, SIGGRAPH '85.