Olivier Muller

发表

HCM: An abstraction layer for seamless programming of DPR FPGA

Pierre-Henri Horrein, Frédéric Pétrot, Yan Xu, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

Bandwidth reduction of extrinsic information exchange in turbo decoding

Amer Baghdadi, Michel Jezequel, Olivier Muller, 2006 .

Generating Efficient Context-Switch Capable Circuits through Autonomous Design Flow

Olivier Muller, Frédéric Rousseau, Alban Bourge, 2016, ACM Trans. Reconfigurable Technol. Syst..

Butterfly and Benes-Based on-Chip Communication Networks for Multiprocessor Turbo Decoding

Amer Baghdadi, Olivier Muller, Michel Jézéquel, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Demonstration of a context-switch method for heterogeneous reconfigurable systems

Olivier Muller, Frédéric Rousseau, Alban Bourge, 2016, 2016 26th International Conference on Field Programmable Logic and Applications (FPL).

A Novel Method for Enabling FPGA Context-Switch (Abstract Only)

Olivier Muller, Frédéric Rousseau, Alban Bourge, 2015, FPGA.

An FPGA target for the StarPU heterogeneous runtime system

Manuel Selva, Frédéric Desprez, Olivier Muller, 2018, 2018 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC).

Automatic High-Level Hardware Checkpoint Selection for Reconfigurable Systems

Olivier Muller, Frédéric Rousseau, Alban Bourge, 2015, 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines.

Influence of the geometric shape of silver nanoparticles on optical limiting

Olivier Muller, Gunnar Ritt, Stefanie Dengler, 2012, Optics/Photonics in Security and Defence.

Message-Oriented Devices on FPGAs

Frédéric Pétrot, Olivier Gruber, Olivier Muller, 2018, 2018 International Symposium on Rapid System Prototyping (RSP).

Parallelism Efficiency in Convolutional Turbo Decoding

Amer Baghdadi, Olivier Muller, Michel Jézéquel, 2010, EURASIP J. Adv. Signal Process..

ASIP-Based Multiprocessor SoC Design for Simple and Double Binary Turbo Decoding

Amer Baghdadi, Olivier Muller, Michel Jézéquel, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Prototyping Dynamic Task Migration on Heterogeneous Reconfigurable Systems

Olivier Muller, Frédéric Rousseau, Arif Sasongko, 2017, 2017 International Symposium on Rapid System Prototyping (RSP).

FPGA Prototypes for Turbo Communication Applications

Amer Baghdadi, Olivier Muller, Camille Leroux, 2009 .

From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding

Amer Baghdadi, Olivier Muller, Michel Jézéquel, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

SPC05-3: On the Parallelism of Convolutional Turbo Decoding and Interleaving Interference

Amer Baghdadi, Olivier Muller, Michel Jézéquel, 2006, IEEE Globecom 2006.

Photoalignment of LCoS LCDs

Olivier Muller, Martin Schadt, Hubert Seiberle, 2002 .

From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding

Amer Baghdadi, Olivier Muller, Michel Jézéquel, 2008, 2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping.

Towards Agile Hardware Designs with Chisel: a Network Use-case

Pierre-Henri Horrein, Frédéric Pétrot, Olivier Muller, 2021 .

Hardware Context Switch-based Cryptographic Accelerator for Handling Multiple Streams

Olivier Muller, Frédéric Rousseau, Arif Sasongko, 2021, ACM Trans. Reconfigurable Technol. Syst..

Maintaining Communication Consistency During Task Migrations in Heterogeneous Reconfigurable Devices

Olivier Muller, Arif Sasongko, Frederic Rousseau, 2021 .