Iuliana Bacivarov

发表

Power agnostic technique for efficient temperature estimation of multicore embedded systems

Lothar Thiele, Devendra Rai, Hoeseok Yang, 2012, CASES '12.

COOLIP: Simple yet effective job allocation for distributed thermally-throttled processors

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Worst-case temperature analysis for different resource models

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2012, IET Circuits Devices Syst..

MAMOT: Memory-Aware Mapping Optimization Tool for MPSoC

Lothar Thiele, Peter Marwedel, Iuliana Bacivarov, 2012, 2012 15th Euromicro Conference on Digital System Design.

EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems

Rainer Leupers, Lothar Thiele, Pier Stanislao Paolucci, 2014, 2014 IEEE International Symposium on Parallel and Distributed Processing with Applications.

EURETILE D7.3 - Dynamic DAL benchmark coding, measurements on MPI version of DPSNN-STDP (distributed plastic spiking neural net) and improvements to other DAL codes pdf

Lothar Thiele, Pier Stanislao Paolucci, Roberto Ammendola, 2014, ArXiv.

Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms

Rainer Leupers, Pier Stanislao Paolucci, Davide Rossetti, 2016, J. Syst. Archit..

Expandable process networks to efficiently specify and explore task, data, and pipeline parallelism

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2013, 2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).

SHAPES - a Scalable Parallel HW/SW Architecture Applied to Wave Field Synthesis

Stefan Kraemer, Rainer Leupers, Lothar Thiele, 2007 .

PRO3D: programming for future 3D manycore architectures

David Atienza, Iuliana Bacivarov, Martino Ruggiero, 2012, INA-OCMC '12.

Building fast and accurate SW simulation models based on hardware abstraction layer and simulation environment abstraction layer

Ahmed Amine Jerraya, Sungjoo Yoo, Iuliana Bacivarov, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

PRO3D, Programming for Future 3D Manycore Architectures: Project's Interim Status

Luca Benini, Yusuf Leblebici, Giovanni De Micheli, 2011, FMCO.

EURETILE 2010-2012 summary: first three years of activity of the European Reference Tiled Experiment pdf

Rainer Leupers, Lothar Thiele, Pier Stanislao Paolucci, 2013, ArXiv.

Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration

Ahmed Amine Jerraya, Iuliana Bacivarov, Wassim Youssef, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

Fast worst-case peak temperature evaluation for real-time applications on multi-core systems

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2012, 2012 13th Latin American Test Workshop (LATW).

Performance Evaluation Methods for Multiprocessor System-on-Chip Designs

Ahmed Amine Jerraya, Iuliana Bacivarov, A. Jerraya, 2016 .

Real-time worst-case temperature analysis with temperature-dependent parameters

Lothar Thiele, Jian-Jia Chen, Devendra Rai, 2013, Real-Time Systems.

Predictability for timing and temperature in multiprocessor system-on-chip platforms

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2013, ACM Trans. Embed. Comput. Syst..

Reliable and Efficient Execution of Multiple Streaming Applications on Intel's SCC Processor

Lothar Thiele, Devendra Rai, Hoeseok Yang, 2013, Euro-Par Workshops.

Multi-Level Software Validation for NoC

Gabriela Nicolescu, Ahmed Amine Jerraya, Iuliana Bacivarov, 2003, Networks on Chip.

Scalably distributed SystemC simulation for embedded applications

Lothar Thiele, Kai Huang, Iuliana Bacivarov, 2008, 2008 International Symposium on Industrial Embedded Systems.

Mapping Applications to Tiled Multiprocessor Embedded Systems

Lothar Thiele, Kai Huang, Iuliana Bacivarov, 2007, Seventh International Conference on Application of Concurrency to System Design (ACSD 2007).

Efficient Worst-Case Temperature Evaluation for Thermal-Aware Assignment of Real-Time Applications on MPSoCs

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2013, Journal of Electronic Testing.

Mapping of applications to MPSoCs

Jürgen Teich, Qiang Xu, Lin Huang, 2011, 2011 Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

AdaPNet: Adapting process networks in response to resource variations

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2014, 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).

Worst-case temperature analysis for real-time systems

Lothar Thiele, Jian-Jia Chen, Devendra Rai, 2011, 2011 Design, Automation & Test in Europe.

Timed HW-SW cosimulation using native execution of OS and application SW

Ahmed Amine Jerraya, Sungjoo Yoo, Iuliana Bacivarov, 2002, Seventh IEEE International High-Level Design Validation and Test Workshop, 2002..

Reliability-aware mapping optimization of multi-core systems with mixed-criticality

Soonhoi Ha, Lothar Thiele, Hoeseok Yang, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Efficient execution of Kahn process networks on multi-processor systems using protothreads and windowed FIFOs

Lothar Thiele, Kai Huang, Iuliana Bacivarov, 2009, 2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia.

Methods and Tools for Mapping Process Networks onto Multi-Processor Systems-On-Chip

Lothar Thiele, Kai Huang, Iuliana Bacivarov, 2010, Handbook of Signal Processing Systems.

Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application

Ahmed Amine Jerraya, Lorenzo Pieralisi, Iuliana Bacivarov, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Generation and calibration of compositional performance analysis models for multi-processor systems

Lothar Thiele, Kai Huang, Iuliana Bacivarov, 2009, 2009 International Symposium on Systems, Architectures, Modeling, and Simulation.

ChronoSym: a new approach for fast and accurate SoC cosimulation

Ahmed Amine Jerraya, Sungjoo Yoo, Iuliana Bacivarov, 2005, Int. J. Embed. Syst..

Methods and Tools for Mapping Process Networks onto Multi-Processor Systems-On-Chip

Lothar Thiele, Kai Huang, Iuliana Bacivarov, 2018, Handbook of Signal Processing Systems.

Embedding formal performance analysis into the design cycle of MPSoCs for real-time streaming applications

Lothar Thiele, Kai Huang, Iuliana Bacivarov, 2012, TECS.

Thermal-Aware Task Assignment for Real-Time Applications on Multi-Core Systems

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2011, FMCO.

Scenario-based design flow for mapping streaming applications onto on-chip many-core systems

Lothar Thiele, Devendra Rai, Hoeseok Yang, 2012, CASES '12.

Static mapping of mixed-critical applications for fault-tolerant MPSoCs

Soonhoi Ha, Lothar Thiele, Hoeseok Yang, 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

Thermal-aware system analysis and software synthesis for embedded multi-processors

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

Worst-Case Temperature Guarantees for Real-Time Applications on Multi-core Systems

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2012, 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium.

Worst-Case Temperature Analysis for Different Resource Availabilities: A Case Study

Lothar Thiele, Hoeseok Yang, Iuliana Bacivarov, 2011, PATMOS.

Designing Applications with Predictable Runtime Characteristics for the Baremetal Intel SCC

Lothar Thiele, Devendra Rai, Iuliana Bacivarov, 2013, Euro-Par Workshops.

A fast and accurate validation technique for operating system in multi-processor system-on-chip design

Ahmed Amine Jerraya, Iuliana Bacivarov, Sungjoo Yoo, 2003, Saratov Fall Meeting.

Multi-objective mapping optimization via problem decomposition for many-core systems

Soonhoi Ha, Lothar Thiele, Hoeseok Yang, 2012, 2012 IEEE 10th Symposium on Embedded Systems for Real-time Multimedia.

A modular fast simulation framework for stream-oriented MPSoC

Kai Huang, Jun Liu, Iuliana Bacivarov, 2009, 2009 IEEE International Symposium on Industrial Embedded Systems.

Coupling MPARM with DOL

Lothar Thiele, Iuliana Bacivarov, Wolfgang Haid, 2009 .