Vinicius S. Livramento

发表

An energy-efficient 8×8 2-D DCT VLSI architecture for battery-powered portable devices

José Luís Almada Güntzel, Vinicius S. Livramento, Bruno George de Moraes, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Speeding up Incremental Legalization with Fast Queries to Multidimensional Trees

José Luís Almada Güntzel, Vinicius S. Livramento, Luiz Cláudio Villar dos Santos, 2016, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Streak: Synergistic topology generation and route synthesis for on-chip performance-critical signal groups

Derong Liu, David Z. Pan, Duo Ding, 2017, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).

Lagrangian relaxation-based Discrete Gate Sizing for leakage power minimization

Marcelo de Oliveira Johann, José Luís Almada Güntzel, Vinicius S. Livramento, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

Exploiting non-critical Steiner tree branches for post-placement timing optimization

José Luís Almada Güntzel, Vinicius S. Livramento, Luiz Cláudio Villar dos Santos, 2015, 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

An energy-efficient FDCT/IDCT configurable IP core for mobile multimedia platforms

José Luís Almada Güntzel, Vinicius S. Livramento, Bruno George de Moraes, 2011, SBCCI '11.

Clock-Tree-Aware Incremental Timing-Driven Placement

José Luís Almada Güntzel, Vinicius S. Livramento, Luiz Cláudio Villar dos Santos, 2016, ACM Trans. Design Autom. Electr. Syst..

Timing-Driven Placement Based on Dynamic Net-Weighting for Efficient Slack Histogram Compression

José Luís Almada Güntzel, Vinicius S. Livramento, Luiz Cláudio Villar dos Santos, 2015, ISPD.

Exploiting parallelism to speed up circuit legalization

Laércio Lima Pilla, José Luís Almada Güntzel, Márcio Bastos Castro, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

How Deep Learning Can Drive Physical Synthesis Towards More Predictable Legalization

Laércio Lima Pilla, José Luís Almada Güntzel, Vinicius S. Livramento, 2019, ISPD.

How Game Engines Can Inspire EDA Tools Development: A use case for an open-source physical design library

Laércio Lima Pilla, José Luís Almada Güntzel, Vinicius S. Livramento, 2017, ISPD.

Evaluating the impact of circuit legalization on incremental optimization techniques

José Luís Almada Güntzel, Vinicius S. Livramento, Luiz Cláudio Villar dos Santos, 2016, 2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI).

A Hybrid Technique for Discrete Gate Sizing Based on Lagrangian Relaxation

Marcelo de Oliveira Johann, José Luís Almada Güntzel, Vinicius S. Livramento, 2014, ACM Trans. Design Autom. Electr. Syst..

Exploiting cache locality to speedup register clustering

Laércio Lima Pilla, José Luís Almada Güntzel, Vinicius S. Livramento, 2017, 2017 30th Symposium on Integrated Circuits and Systems Design (SBCCI).

Enhancing Multi-Threaded Legalization Through $k$-d Tree Circuit Partitioning

Laércio Lima Pilla, José Luís Almada Güntzel, Vinicius S. Livramento, 2018, 2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI).

Concurrent pin access optimization for unidirectional routing

David Z. Pan, Xiaoqing Xu, Vinicius S. Livramento, 2017, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).

Fast and efficient Lagrangian Relaxation-based Discrete Gate Sizing

Marcelo de Oliveira Johann, José Luís Almada Güntzel, Vinicius S. Livramento, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Signal Identification Track Info Signal Group Info Backbone Generation Synergistic Routing Candidate Generation Complete ? Streak Output Y Primal-Dual Solution Update

Vinicius S. Livramento, D. Pan, Derong Liu, 2018 .

Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning

Laércio Lima Pilla, José Luís Almada Güntzel, Vinicius S. Livramento, 2022, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.