Mohammad Javidan

Vibration-based classification of centrifugal pumps using support vector machine and discrete wavelet transform

Ebrahim Ebrahimi, Mohammad Javidan, E. Ebrahimi, 2017 .

Distributed clock generator for synchronous SoC using ADPLL network

Olivier Billoint, Gérard Scorletti, Jérôme Juillard, 2013, Proceedings of the IEEE 2013 Custom Integrated Circuits Conference.

FPGA implementation of reconfigurable ADPLL network for distributed clock generation

Olivier Romain, Mehdi Terosiet, Jérôme Juillard, 2011, 2011 International Conference on Field-Programmable Technology.

Band-pass continuous-time delta-sigma modulators employing LWR resonators

Philippe Bénabès, Mohammad Javidan, 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

A design approach for networks of Self-Sampled All-Digital Phase-Locked Loops

Jérôme Juillard, Anton Korniienko, Éric Colinet, 2011, 2011 20th European Conference on Circuit Theory and Design (ECCTD).

High-loop-delay sixth-order bandpass continuoustime Sigma-Delta modulators

Philippe Bénabès, Jérôme Juillard, Mohammad Javidan, 2013, IET Circuits Devices Syst..

Conception des modulateurs sigma-delta d'ordre élévé pour des convertisseurs analogique-numérique en parallèle

Mohammad Javidan, Mohammad Javidan, 2009 .

All-digital PLL array provides reliable distributed clock for SOCs

Gérard Scorletti, Jérôme Juillard, Anton Korniienko, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

A Digitally Controlled Oscillator in a 65-nm CMOS process for SoC clock generation

Jérôme Juillard, Éric Colinet, Dimitri Galayko, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).