Kiwamu Takada

Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core

Tetsuya Yamada, Fumio Arakawa, Makoto Ishikawa, 2006, IEICE Trans. Electron..

Low-power design of 90-nm SuperH/spl trade/ processor core

Tetsuya Yamada, Fumio Arakawa, Makoto Ishikawa, 2005, 2005 International Conference on Computer Design.

A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption

Hironori Kasahara, Keiji Kimura, Kunio Uchiyama, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.