Meng-Lin Yu

发表

A 10 Gb/s and 40 Gb/s forward-error-correction device for optical communications

Leilei Song, Meng-Lin Yu, M.S. Shaffer, 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

Equalization and FEC techniques for optical transceivers

Kamran Azadet, Erich F. Haratsch, Leilei Song, 2002, IEEE J. Solid State Circuits.

A low power adaptive filter using dynamic reduced 2's-complement representation

Zhan Yu, Alan N. Willson, Meng-Lin Yu, 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

Specification and synthesis of a mixed-mode systems: Experiments in a VHDL environment

P. A. Subrahmanyam, Meng-Lin Yu, Josep M. Espinalt, 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

YADDES: a novel algorithm for deadlock-free distributed discrete-event simulation

Sumit Ghosh, Meng-Lin Yu, Erik Debenedictis, 1995 .

A provably correct, non-deadlocking parallel event simulation algorithm

Sumit Ghosh, Meng-Lin Yu, Erik DeBenedictis, 1991, Annual Simulation Symposium.

VLSI timing simulation with selective dynamic regionization

Bryan D. Ackland, Meng-Lin Yu, 1994, ICCAD.

En route to more efficient conservative parallel event simulation

Meng-Lin Yu, 1992, Proceedings. 25th Annual Simulation Symposium.

A novel algorithm for discrete-event simulation: asynchronous distributed discrete-event simulation algorithm for cyclic circuits using a dataflow network

Sumit Ghosh, Meng-Lin Yu, Erik DeBenedictis, 1991, Computer.

VLSI design of Reed-Solomon decoder architectures

Leilei Song, Meng-Lin Yu, Hanho Lee, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Signal representation guided synthesis using carry-save adders for synchronous data-path circuits

Zhan Yu, Alan N. Willson, Meng-Lin Yu, 2001, DAC '01.

Vlsi Timing Simulation With Selective Dynamic Regionization

Bryan D. Ackland, Meng-Lin Yu, 1994, IEEE/ACM International Conference on Computer-Aided Design.

En route to more efficient conservative parallel event simulation

Meng-Lin Yu, 1992, Annual Simulation Symposium.

An arbitrarily fast block processing architecture for decision feedback equalizers

Meng-Lin Yu, K. Azadet, 1999, 1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453).

A Multi-Carrier QAM Transceiver for Ultra-Wideband Optical Communication

Meng-Lin Yu, K. Azadet, E. Sackinger, 2006, IEEE Journal of Solid-State Circuits.

An Asynchronous Distributed Approach for the Simulation of Behavior-Level Models on Parallel Processors

Sumit Ghosh, Meng-Lin Yu, Sumit Ghosh, 1995, IEEE Trans. Parallel Distributed Syst..

10- and 40-Gb/s forward error correction devices for optical communications

Leilei Song, Meng-Lin Yu, M. S. Shaffer, 2002 .

A provably correct, non-deadlocking parallel event simulation algorithm

Sumit Ghosh, Meng-Lin Yu, Erik Debenedictis, 1991 .

A Preemtive Scheduling Mechanism for Accurate Behavioral Simulation of Digital Designs

Sumit Ghosh, Meng-Lin Yu, 1989, IEEE Trans. Computers.

A new approach for checking the unique state coding property of signal transition graphs

P. A. Subrahmanyam, Meng-Lin Yu, 1992, [1992] Proceedings The European Conference on Design Automation.

The use of reduced two's-complement representation in low-power DSP design

Zhan Yu, Alan N. Willson, Kamran Azadet, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Hazard-Free Asynchronous Circuit Synthesis

P. A. Subrahmanyam, Meng-Lin Yu, 1993, Asynchronous Design Methodologies.

VLSI timing simulation with selective dynamic regionization

Bryan D. Ackland, Meng-Lin Yu, 1994, 27th Annual Simulation Symposium.

DSP techniques for optical transceivers

Meng-Lin Yu, M. Shaffer, K. Azadet, 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).

Equalization and FEC Techniques for

Kamran Azadet, Leilei Song, Meng-Lin Yu, 2002 .

Differential fault simulation for sequential circuits

Wu-Tung Cheng, Meng-Lin Yu, 1990, J. Electron. Test..

TCU: Thread compaction unit for GPGPU applications on mobile graphics hardware

Shao-Yi Chien, Meng-Lin Yu, Yu-Jung Chen, 2012, 2012 IEEE 14th International Workshop on Multimedia Signal Processing (MMSP).

Differential Fault Simulation - A Fast Method Using Minimal Memory

Wu-Tung Cheng, Meng-Lin Yu, W.-T. Cheng, 1989, 26th ACM/IEEE Design Automation Conference.

Automatic Random Logic Layout Synthesis - a Module Generator Approach (Vlsi, Silicon Compilation, Design Automation, Cell Synthesis, Grid)

Meng-Lin Yu, 1986 .

A path-oriented approach for reducing hazards in asynchronous designs

P. A. Subrahmanyam, Meng-Lin Yu, 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

A low power FIR filter design technique using dynamic reduced signal representation

Zhan Yu, Alan N. Willson, Meng-Lin Yu, 2001, 2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517).