Amer Samarah

Multi-phase bang-bang digital phase lock loop with accelerated frequency acquisition

Anthony Chan Carusone, Amer Samarah, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Efficient Assertion Based Verification using TLM

Sofiène Tahar, Otmane Aït Mohamed, Ali Habibi, 2006, Proceedings of the Design Automation & Test in Europe Conference.

A Digital Phase-Locked Loop With Calibrated Coarse and Stochastic Fine TDC

Anthony Chan Carusone, Amer Samarah, A. C. Carusone, 2012, IEEE Journal of Solid-State Circuits.

Automated Coverage Directed Test Generation Using a Cell-Based Genetic Algorithm

Sofiène Tahar, Nawwaf N. Kharma, Ali Habibi, 2006, 2006 IEEE International High Level Design Validation and Test Workshop.

Cycle-slipping pull-in range of bang-bang PLLs

Anthony Chan Carusone, Amer Samarah, 2015, 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS).

A dead-zone free and linearized digital PLL

Anthony Chan Carusone, Amer Samarah, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

Improved Phase Detection for Digital Phase-locked Loops

Amer Samarah, 2016 .

Towards a faster simulation of SystemC designs

Sofiène Tahar, Ali Habibi, Haja Moinudeen, 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).