Theodore W. Houston

A guide to simulation of hysteretic gate delays based on physical understanding [SOI logic]

Theodore W. Houston, S. Unnikrishnan, 1998, 1998 IEEE International SOI Conference Proceedings (Cat No.98CH36199).

A 553 K-transistor LISP processor chip

Theodore W. Houston, K. N. Ruparel, S. Lusky, 1987 .

Isolation techniques for 256 Mbit SOI DRAM application

Theodore W. Houston, Yin Hu, Clarence W. Teng, 1995, 1995 IEEE International SOI Conference Proceedings.

A universal structure for SRAM cell characterization

Theodore W. Houston, Xiaowei Deng, Wah Kit Loh, 2010, 2010 International Conference on Microelectronic Test Structures (ICMTS).

A novel dynamic Vt circuit configuration

Theodore W. Houston, 1997, 1997 IEEE International SOI Conference Proceedings.

An SEU resistant 256 K SOI SRAM

Theodore W. Houston, William E. Bailey, H. Lu, 1992 .