Aravind Dasu

发表

Pattern recognition tool to detect reconfigurable patterns in MPEG4 video processing

Ali Akoglu, Aravind Dasu, Arvind Sudarsanam, 2002, Proceedings 16th International Parallel and Distributed Processing Symposium.

Memory architecture template for Fast Block Matching algorithms on FPGAs

Aravind Dasu, Arvind Sudarsanam, Shant Chandrakar, 2010, 2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW).

Reconfigurable media processing

Aravind Dasu, Sethuraman Panchanathan, 2002, Parallel Comput..

Temporal partitioning of circuits for advanced partially reconfigurable systems

Aravind Dasu, Sethuraman Panchanathan, Rajanikant Mohan, 2001, SPIE ITCom.

Performance of a LU decomposition on a multi-FPGA system compared to a low power commodity microprocessor system

Aravind Dasu, Arvind Sudarsanam, Seth Young, 2007, Scalable Comput. Pract. Exp..

Deriving FPGA Based Custom Soft-Core Microprocessors for Mission Planning Algorithms

Aravind Dasu, Jonathan D. Phillips, 2007 .

Self-configurable architecture for reusable systems with Accelerated Relocation Circuit (SCARS-ARC)

Ali Akoglu, Aravind Dasu, Adarsha Sreeramareddy, 2010, 2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW).

Welcome message

Aravind Dasu, Jürgen Becker, Elaheh Bozorgzadeh, 2010, 2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW).

A Faddeev Systolic Array for EKF-SLAM and its Arithmetic Data Representation Impact on FPGA

Aravind Dasu, Pedro C. Diniz, Vanderlei Bonato, 2018, J. Signal Process. Syst..

Mapping 1D-FFT on an energy efficient 3D FPGA-DRAM architecture

Ali Akoglu, Aravind Dasu, Peter Gadfort, 2015, 2015 Fourth Berkeley Symposium on Energy Efficient Electronic Systems (E3S).

Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs

Gregory K. Chen, Ram Krishnamurthy, Aravind Dasu, 2019, 2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

Hardware/Software Co-designed Extended Kalman Filter on an FPGA

Aravind Dasu, Robert Collier Barnes, 2008, ERSA.

Application-specific low-power hybrid FPGA architecture design

Ali Akoglu, Aravind Dasu, Sethuraman Panchanathan, 2005, IS&T/SPIE Electronic Imaging.

Design of reconfigurable processors

Aravind Dasu, Sethuraman Panchanathan, 2004 .

Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI

Gregory K. Chen, Ram Krishnamurthy, Aravind Dasu, 2019, FPGA.

A power efficient reconfigurable system-in-stack: 3D integration of accelerators, FPGAs, and DRAM

Ali Akoglu, Aravind Dasu, Peter Gadfort, 2014, 2014 27th IEEE International System-on-Chip Conference (SOCC).

Initial Approaches for Discovery of Undocumented Functionality in FPGAs

Aravind Dasu, Matthew French, Andrew G. Schmidt, 2017 .

Dynamically reconfigurable systolic array accelerators: A case study with extended Kalman filter and discrete wavelet transform algorithms

Aravind Dasu, Arvind Sudarsanam, Ramachandra Kallam, 2010, IET Comput. Digit. Tech..

A Reconfigurable Load Balancing Architecture for Molecular Dynamics

Aravind Dasu, Chris Rogers, Jonathan Phillips, 2007, 2007 IEEE International Parallel and Distributed Processing Symposium.

A survey of media processing approaches

Aravind Dasu, Sethuraman Panchanathan, 2002, IEEE Trans. Circuits Syst. Video Technol..

An Analysis Tool Set for Reconfigurable Media Processing

Ali Akoglu, Aravind Dasu, Sethuraman Panchanathan, 2003, Engineering of Reconfigurable Systems and Algorithms.

Cluster Extraction for Hybrid FPGA Architecture in Computation Intensive Applications

Ali Akoglu, Aravind Dasu, Sethuraman Panchanathan, 2004, International Conference on Engineering of Reconfigurable Systems and Algorithms.

In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC

Aravind Dasu, Eriko Nurvitadhi, Asit K. Mishra, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

A fast and efficient FPGA-based implementation for solving a system of linear interval equations

Aravind Dasu, Arvind Sudarsanam, 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

A Power Efficient Linear Equation Solver on A Multi-Fpgaaccelerator

Aravind Dasu, Arvind Sudarsanam, Seth Young, 2010 .

2010 International Conference on Reconfigurable Computing and FPGAs, ReConFig10

Viktor K. Prasanna, Aravind Dasu, René Cumplido, 2010 .

Analysis and Design of a Context Adaptable SAD/MSE Architecture

Aravind Dasu, Arvind Sudarsanam, Karthik Vaithianathan, 2009, Int. J. Reconfigurable Comput..

Memory support design for LU decomposition on the starbridge hyper-computer

Aravind Dasu, Arvind Sudarsanam, Seth Young, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Methodology to derive resource aware context adaptable architectures for FPGAs

Aravind Dasu, Harikrishna Samala, 2010, IET Comput. Digit. Tech..

Arithmetic precision for perspective transform in sprite decoding of MPEG-4

Aravind Dasu, Sethuraman Panchanathan, Subramanian Raghavan, 1999, Electronic Imaging.

Selected Papers from the 17th Reconfigurable Architectures Workshop (RAW2010)

Aravind Dasu, Jürgen Becker, Elaheh Bozorgzadeh, 2011, Int. J. Reconfigurable Comput..

Lifting kernel-based sprite codec

Aravind Dasu, Sethuraman Panchanathan, 2000, IS&T/SPIE Electronic Imaging.

In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC

Aravind Dasu, Eriko Nurvitadhi, Asit K. Mishra, 2018, FPL.

A wavelet-based sprite codec

Aravind Dasu, Sethuraman Panchanathan, 2004, IEEE Transactions on Circuits and Systems for Video Technology.

A c to register transfer level algorithm using structured circuit templates: a case study with simulated annealing

Aravind Dasu, Jonathan D. Phillips, A. Dasu, 2008 .

PRR-PRR Dynamic Relocation

Aravind Dasu, Arvind Sudarsanam, Ramachandra Kallam, 2009, IEEE Computer Architecture Letters.

Task Scheduling of Control-Data Flow Graphs for Reconfigurable Architectures

Aravind Dasu, Arvind Sudarsanam, Sethuraman Panchanathan, 2004, International Conference on Engineering of Reconfigurable Systems and Algorithms.

Specializing FGPU for Persistent Deep Learning

Aravind Dasu, Martin Langhammer, Eriko Nurvitadhi, 2021, ACM Trans. Reconfigurable Technol. Syst..

FlexScore: Quantifying Flexibility

Aravind Dasu, Martin Langhammer, Eriko Nurvitadhi, 2021, IEEE Computer Architecture Letters.

DO-GPU: Domain Optimizable Soft GPUs

Aravind Dasu, Martin Langhammer, Eriko Nurvitadhi, 2021, 2021 31st International Conference on Field-Programmable Logic and Applications (FPL).

SCALE ROBUST HEAD POSE ESTIMATION BASED ON RELATIVE HOMOGRAPHY TRANSFORMATION

Aravind Dasu, Heng-Da Cheng, Chenguang Liu, 2014 .

A thermal-mechanical coupled finite element model with experimental temperature verification for vertically stacked FPGAs

Aravind Dasu, Chunbo Zhang, Ramachandra Kallam, 2012 .