Andrzej Pulka

发表

High Level Model of Time Predictable Multitask Control Unit

Łukasz Golly, Adam Milik, Andrzej Pulka, 2015 .

A Heuristic Fault Dictionary Reduction Methodology

Andrzej Pulka, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

Selection of search strategies for solving 3-SAT problems

Andrzej Pulka, 2014, Int. J. Appl. Math. Comput. Sci..

SystemC models generation based on libraries of templates

Andrzej Pulka, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Decision supporting system based on fuzzy default reasoning

Andrzej Pulka, 2009, 2009 2nd Conference on Human System Interactions.

Dynamic rescheduling of tasks in time predictable embedded systems

Adam Milik, Andrzej Pulka, 2012, PDeS.

An Efficient Hardware Implementation of Smith-Waterman Algorithm Based on the Incremental Approach

Adam Milik, Andrzej Pulka, 2011 .

Automated selection of embedded functions for SoC models based on IPs library

Andrzej Pulka, 2006 .

Multithread RISC architecture based on programmable interleaved pipelining

Adam Milik, Andrzej Pulka, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

SystemC ModelsGeneration Based onLibraries ofTemplates

Andrzej Pulka, 2006 .

Modeling Assistant — A Flexible VCM Generator in VHDL

Andrzej Pulka, 2001 .

Digitally programmable modified current differencing transconductance amplifier in 40-nm technology: design flow, parameter analyses and applications

Andrzej Pulka, Adam Kristof, Andrzej Malcher, 2020, IET Circuits Devices Syst..

A heterogenous approach to symbolic calculations based on structural numbers

Andrzej Pulka, Lukasz Golly, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

Considerations on incremental approach to hardware implementation of Smith-Waterman algorithm

Adam Milik, Andrzej Pulka, 2011, Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2011.

System on chip verification strategy based on FDL mechanism

Andrzej Pulka, 2010, ICSES 2010 International Conference on Signals and Electronic Circuits.

SystemC hardware-software design and simulation platform based on AMBA bus

Adam Milik, Andrzej Pulka, Lukasz Golly, 2011, Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2011.

A common-sense based approach to the automated test-point selection in fault diagnosis

Andrzej Pulka, Jerzy Rutkowski, 2007, 2007 18th European Conference on Circuit Theory and Design.

Hardware oriented optimization of Smith-Waterman algorithm

Adam Milik, Andrzej Pulka, 2010, ICSES 2010 International Conference on Signals and Electronic Circuits.

On FPGA dedicated SFC synthesis and implementation according to IEC61131

Adam Milik, Andrzej Pulka, 2014, 2014 International Conference on Signals and Electronic Systems (ICSES).

Polish Speech Processing Expert System Incorporated into the EDA Tool

Andrzej Pulka, Piotr Kłosowski, 2009 .

Analysis of timing resources for highly predictable real-time systems models

Andrzej Pulka, Lukasz Golly, 2013, Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2013.

VEST - An intelligent tool for timing SoCs verification using UML timing diagrams

Adam Milik, Andrzej Pulka, 2008, 2008 Forum on Specification, Verification and Design Languages.

Common HDL-Matlab Simulation Environment

Adam Milik, Andrzej Pulka, 2007, FDL.

Experiences with modeling of analog and mixed A/D systems based on PWL technique

Jerzy J. Dabrowski, Andrzej Pulka, 1999, DATE '99.

Preface

Andrzej Pulka, 2016, Microprocess. Microsystems.

Two Heuristic Algorithms for Test Point Selection in Analog Circuit Diagnoses

Andrzej Pulka, 2011 .

Hardware model of commonsense reasoning based on Fuzzy Default Logic

Adam Milik, Andrzej Pulka, 2010, 3rd International Conference on Human System Interaction.

Some issues concerning design space exploration in time predictable embedded systems

Andrzej Pulka, Lukasz Golly, 2016, 2016 International Conference on Signals and Electronic Systems (ICSES).

C03: Transaction level models analyzer in prolog

Andrzej Pulka, 2004 .

Dynamic reconfiguration of threads in real-time system working on precision time regime

Adam Milik, Andrzej Pulka, 2010, ICSES 2010 International Conference on Signals and Electronic Circuits.

Efficient modeling of analog and mixed A/D systems via piece-wise linear technique

Andrzej Pulka, Jerzy Dąbrowski, 2001 .

Measurement Aspects of Genome Pattern Investigations - Hardware Implementation

Adam Milik, Andrzej Pulka, 2012 .

The reconfigurable hardware accelerator for searching genome patterns

Adam Milik, Andrzej Pulka, 2009, PDeS.

On efficient implementation of search algorithm for genome patterns

Andrzej Pulka, Adam Milik, 2010, PDeS.

Automatic implementation of arithmetic operation in reconfigurable logic controllers

Adam Milik, Andrzej Pulka, A. Pułka, 2011, 2011 20th European Conference on Circuit Theory and Design (ECCTD).

Flexible hardware approach to multi-core time-predictable systems design based on the interleaved pipeline processing

Andrzej Pulka, Ernest Antolak, 2020, IET Circuits Devices Syst..