Marco Re

发表

ZnO-rGO Composite Thin Film Resistive Switching Device: Emulating Biological Synapse Behavior

Gian Carlo Cardarilli, Gaurav Mani Khanal, Simone Acciarito, 2016, ApplePies.

Design of a totally self checking signature analysis checker for finite state machines

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Localization of faults in radix-n signed digit adders

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

Digital Architecture and ASIC Implementation of Wideband Delta DOR Spacecraft Onboard Tracker

Gian Carlo Cardarilli, Lorenzo Simone, Dario Gelfusa, 2018, 2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).

M-PSK Demodulator with Joint Carrier and Timing Recovery

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2020 .

Optimized Implementation of RNS FIR Filters Based on FPGAs

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2012, J. Signal Process. Syst..

A Power Efficient Digital Front-End for Cognitive Radio Systems

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2018, 2018 52nd Asilomar Conference on Signals, Systems, and Computers.

CMOS and bipolar novel low-power adaptive biasing topologies

Gian Carlo Cardarilli, Marco Re, Giuseppe Ferri, 1999 .

FPGA Implementation of a Low-Power QRS Extractor

Gian Carlo Cardarilli, Gaurav Mani Khanal, Simone Acciarito, 2017, ApplePies.

A tool for automatic generation of RTL-level VHDL description of RNS FIR filters

Marco Re, Alberto Nannarelli, Andrea Del Re, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

A CAD environment for fuzzy systems HW/SW mapping

Gian Carlo Cardarilli, Marco Re, Mario Salmeri, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

FPGA Implementation of a Channelizer with 2048 Channels Utilizing USRP-SDR Platform for Satellite Communications

Gaurav Mani Khanal, Simone Acciarito, Marco Re, 2017, ApplePies.

On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

A framework for dynamically-loaded hardware library (HLL) in FPGA acceleration

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2015, 2015 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT).

Design Space Exploration Based Methodology for Residue Number System Digital Filters Implementation

Luca Di Nunzio, Rocco Fazzolari, Marco Re, 2020, IEEE Transactions on Emerging Topics in Computing.

Q‐RTS: a real‐time swarm intelligence based on multi‐agent Q‐learning

Gian Carlo Cardarilli, Rocco Fazzolari, Marco Re, 2019, Electronics Letters.

On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2008, VLSI-SoC.

Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders

Salvatore Pontarelli, Adelio Salsano, Massimo Violante, 2007, 13th IEEE International On-Line Testing Symposium (IOLTS 2007).

AW-SOM, an Algorithm for High-Speed Learning in Hardware Self-Organizing Maps

Rocco Fazzolari, Marco Re, Gian Carlo Cardarilli, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Design of large polyphase filters in the Quadratic Residue Number System

Yann Oster, Gian Carlo Cardarilli, Marco Re, 2010, 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers.

Spiking neural networks based on LIF with latency: Simulation and synchronization effects

Gian Carlo Cardarilli, Luca Di Nunzio, Alessandro Cristini, 2013, 2013 Asilomar Conference on Signals, Systems and Computers.

A Q-Learning based PSK Symbol Synchronizer

Gian Carlo Cardarilli, Rocco Fazzolari, Marco Re, 2019, 2019 International Symposium on Signals, Circuits and Systems (ISSCS).

Twenty years of research on RNS for DSP: Lessons learned and future perspectives

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

Improvement of the Cardiac Oscillator Based Model for the Simulation of Bundle Branch Blocks

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2019, Applied Sciences.

Indoor Localization System Based on Bluetooth Low Energy for Museum Applications

Romeo Giuliano, Franco Mazzenga, Gian Carlo Cardarilli, 2020, Electronics.

FPGA oriented design of parity sharing RS codecs

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2005, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05).

Error detection in addition chain based ECC Point Multiplication

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2009, 2009 15th IEEE International On-Line Testing Symposium.

Robust throughput boosting for low latency dynamic partial reconfiguration

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2017, 2017 30th IEEE International System-on-Chip Conference (SOCC).

ADAPTO: full-adder based reconfigurable architecture for bit level operations

Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, 2008, 2008 IEEE International Symposium on Circuits and Systems.

Cognitive Based Design of a Human Machine Interface for Telenavigation of a Space Rover

Giorgio Guglieri, Marco Re, Luca De Filippis, 2014 .

IP Generator Tool for Efficient Hardware Acceleration of Self-organizing Maps

Marco Re, Marco Matta, Sergio Spanò, 2018, ApplePies.

Power-delay tradeoffs in residue number system

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Acoustic Emissions Detection and Ranging of Cracks in Metal Tanks Using Deep Learning

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2019, ApplePies.

Improved large-signal model for vacuum triodes

Gian Carlo Cardarilli, Marco Re, Leonardo Di Carlo, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Speed-up of RISC processor computation using ADAPTO

Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Optimized QPSK modulator for DVB-S applications

Gian Carlo Cardarilli, Lorenzo Simone, Marco Re, 2006, 2006 IEEE International Symposium on Circuits and Systems.

TDES cryptography algorithm acceleration using a reconfigurable functional unit

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Concurrent Error Detection in Reed–Solomon Encoders and Decoders

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Low-power implementation of polyphase filters in Quadratic Residue Number system

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Error detection in signed digit arithmetic circuit with parity checker [adder example]

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2003, Proceedings 18th IEEE Symposium on Defect and Fault Tolerance in VLSI Systems.

Compressive sensing spectrum analysis for space autonomous radio receivers

Gian Carlo Cardarilli, Lorenzo Simone, Marco Re, 2013, 2013 Asilomar Conference on Signals, Systems and Computers.

Efficient Ensemble Machine Learning Implementation on FPGA Using Partial Reconfiguration

Luca Di Nunzio, Rocco Fazzolari, Marco Re, 2018, ApplePies.

Characterization of RNS multiply-add units for power efficient DSP

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2015, 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS).

Fault localization, error correction, and graceful degradation in radix 2 signed digit-based adders

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2006, IEEE Transactions on Computers.

RNS Applications in Digital Signal Processing

Marco Re, Gian Carlo Cardarilli, Alberto Nannarelli, 2017 .

A signed digit adder with error correction and graceful degradation capabilities

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2004, Proceedings. 10th IEEE International On-Line Testing Symposium.

Degrading precision arithmetic for low power signal processing

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2010, 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers.

Karatsuba implementation of FIR filters

Salvatore Pontarelli, Gian Carlo Cardarilli, Marco Re, 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

VLSI implementation of a real time fuzzy processor

Roberto Lojacono, Gian Carlo Cardarilli, Marco Re, 1998, J. Intell. Fuzzy Syst..

A Wireless Sensor Node Based on Microbial Fuel Cell

Gian Carlo Cardarilli, Simone Acciarito, Luca Di Nunzio, 2015, ApplePies.

Partial reconfiguration in the implementation of autonomous radio receivers for space

Gian Carlo Cardarilli, Lorenzo Simone, Marco Re, 2011, 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC).

Energy Consumption Saving in Embedded Microprocessors Using Hardware Accelerators

Luca Di Nunzio, Rocco Fazzolari, Marco Re, 2018 .

Compressive Sensing Reconstruction for Complex System: A Hardware/Software Approach

Gian Carlo Cardarilli, Gaurav Mani Khanal, Simone Acciarito, 2016, ApplePies.

Efficient Implementation of a Demultiplexer Based on a Multirate Filter Bank for the Skyplex Satellites DVB System

Gian Carlo Cardarilli, Marco Re, Andrea Del Re, 2002, VLSI Design.

Error Correction Codes for SEU and SEFI Tolerant Memory Systems

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2009, 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Low-power adaptive filter based on RNS components

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2007, 2007 IEEE International Symposium on Circuits and Systems.

A Comparative Evaluation of Designs for Reliable Memory Systems

Fabrizio Lombardi, Marco Ottavi, Salvatore Pontarelli, 2005, J. Electron. Test..

A fault tolerant hardware based file system manager for solid state mass memory

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Tradeoffs between residue number system and traditional FIR filters

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Approximated Canonical Signed Digit for Error Resilient Intelligent Computation

Luca Di Nunzio, Rocco Fazzolari, Marco Re, 2019, 2019 53rd Asilomar Conference on Signals, Systems, and Computers.

High Performance Bit-Stream Decompressor for Partial Reconfigurable FPGAs

Gian Carlo Cardarilli, Marco Re, Ilir Shuli, 2014, ApplePies.

Fine-grain Reconfigurable Functional Unit for embedded processors

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2011, 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2010, 2010 8th Workshop on Intelligent Solutions in Embedded Systems.

Optimization of Self Checking FIR filters by means of Fault Injection Analysis

Salvatore Pontarelli, Adelio Salsano, Massimo Violante, 2007, 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007).

Analysis of Errors and Erasures in Parity Sharing RS Codecs

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2007, IEEE Transactions on Computers.

A Parallel Hardware Implementation for 2-D Hierarchical Clustering Based on Fuzzy Logic

Luca Di Nunzio, Rocco Fazzolari, Marco Re, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

A self-checking cell logic block for fault tolerant FPGAs

Marco Ottavi, Salvatore Pontarelli, A. Leandri, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

A new electric encoder position estimator based on the Chinese Remainder Theorem for the CMG performance improvements

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Design of a self checking Reed Solomon encoder

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2005, 11th IEEE International On-Line Testing Symposium.

Power efficient design of parallel/serial FIR filters in RNS

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving

Ruby B. Lee, Gian Carlo Cardarilli, Luca Di Nunzio, 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

Design of a fault tolerant solid state mass memory

Marco Ottavi, Salvatore Pontarelli, A. Leandri, 2003, IEEE Trans. Reliab..

FPGA implementation of a demux based on a multirate filter bank

Roberto Lojacono, Gian Carlo Cardarilli, Marco Re, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

A hardware framework for on-chip FPGA acceleration

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2016, 2016 International Symposium on Integrated Circuits (ISIC).

Hardware Prototyping and Validation of a W-ΔDOR Digital Signal Processor

Gian Carlo Cardarilli, Dario Gelfusa, Luciano Iess, 2019, Applied Sciences.

Dynamically-loaded Hardware Libraries (HLL) technology for audio applications

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2016, 2016 50th Asilomar Conference on Signals, Systems and Computers.

RNS-to-binary conversion for efficient VLSI implementation

Gian Carlo Cardarilli, Marco Re, R. Lojacono, 1998 .

Efﬁcient FPGA implementation of high speed digital delay for wideband beamforming using parallel architectures

Rocco Fazzolari, Marco Re, Gian Carlo Cardarilli, 2019, Bulletin of Electrical Engineering and Informatics.

Concurrent error detection in Reed Solomon decoders

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Totally Fault Tolerant RNS Based FIR Filters

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2008, 2008 14th IEEE International On-Line Testing Symposium.

A full-adder based reconfigurable architecture for fine grain applications: ADAPTO

Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

Imprecise arithmetic for low power image processing

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

Degrading precision arithmetics for low-power FIR implementation

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion

Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli, Roberto Lojacono, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Setup and experimental results analysis of COTS Camera and SRAMs at the ISIS neutron facility

Marco Ottavi, Pedro Reviriego, Gian Carlo Cardarilli, 2018, 2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS).

Hardware implementation of MPEG analysis and deblocking for video enhancement

Gian Carlo Cardarilli, Marco Re, Huiying Li, 2009, 2009 Conference Record of the Forty-Third Asilomar Conference on Signals, Systems and Computers.

IP based reconfigurable digital platform for satellite communications

Gian Carlo Cardarilli, Marco Re, Andrea Del Re, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

$N$ -Dimensional Approximation of Euclidean Distance

Gian Carlo Cardarilli, Rocco Fazzolari, Marco Re, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Merged Carrier and Timing Recovery Loops QPSK Demodulator based on Iterative Learning Control

Gian Carlo Cardarilli, Rocco Fazzolari, Marco Re, 2019, 2019 International Symposium on Signals, Circuits and Systems (ISSCS).

Hardware Implementation of Real-Time MPEG Analysis and Deblocking for Video Enhancement

Soren Forchhammer, Marco Re, Gian Carlo Cardarilli, 2009 .

Power characterization of digital filters implemented on FPGA

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Comparison and Implementation of Variable Fractional Delay Filters for Wideband Digital Beamforming

Marco Re, Gian Carlo Cardarilli, Marco Matta, 2018, ApplePies.

High Dynamic Optimized Carrier Loop Improvement for Tracking Doppler Rates

Gian Carlo Cardarilli, Marco Re, Amirhossein Fereidountabar, 2015, J. Electr. Comput. Eng..

FPGA implementation of a general purpose HMM processor based on token passing algorithm

D. Bianchi, Marco Re, Gian Carlo Cardarilli, 2005, Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005..

A Software Defined Radio Architecture for a Regenerative Onboard processor

Catherine Morlet, Gian Carlo Cardarilli, Marco Re, 2008, 2008 NASA/ESA Conference on Adaptive Hardware and Systems.

Truncated multipliers through power-gating for degrading precision arithmetic

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2013, 2013 Asilomar Conference on Signals, Systems and Computers.

A Reinforcement Learning-Based QAM/PSK Symbol Synchronizer

Rocco Fazzolari, Marco Re, Gian Carlo Cardarilli, 2019, IEEE Access.

A self checking Reed Solomon encoder: design and analysis

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2005, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05).

A Novel Error Detection and Correction Technique for RNS Based FIR Filters

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2008, 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems.

Hardware design of LIF with Latency neuron model with memristive STDP synapses pdf

Gian Carlo Cardarilli, Gaurav Mani Khanal, Simone Acciarito, 2017, Integr..

FPGA realization of RNS to binary signed conversion architecture

Roberto Lojacono, Gian Carlo Cardarilli, Marco Re, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams

Marco Ottavi, Gian Carlo Cardarilli, Luca Di Nunzio, 2016, 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Residue Number Systems: a Survey

Marco Re, Alberto Nannarelli, Dtu Informatics, 2008 .

Digital Architecture of Next Generation Spacecraft Tracker Based on Wideband ∆DOR

Gian Carlo Cardarilli, Lorenzo Simone, Dario Gelfusa, 2017, ApplePies.

Approximated computing for low power neural networks

Luca Di Nunzio, Rocco Fazzolari, Marco Re, 2019, TELKOMNIKA (Telecommunication Computing Electronics and Control).

Arithmetic/logic blocks for fine-grained reconfigurable units

Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, 2009, 2009 IEEE International Symposium on Circuits and Systems.

An Efficient Hardware Implementation of Reinforcement Learning: The Q-Learning Algorithm

Rocco Fazzolari, Marco Re, Gian Carlo Cardarilli, 2019, IEEE Access.

Programmable power-of-two RNS scaler and its application to a QRNS polyphase filter

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Fully digital intensity modulated LIDAR

Gian Carlo Cardarilli, Marco Re, Roberto Pizzoferrato, 2016 .

Perspectives of QoS Management Based on QoAS for 3G Communication Systems

Pasquale Daponte, Dario Petri, Salvatore Graziani, 2003, Wirel. Pers. Commun..

VLSI implementation of reconfigurable cells for RFU in embedded processors

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

High performance fuzzy processors

Marco Re, Gian Carlo Cardarilli, R. Lojacono, 2001 .

FPGA Acceleration by Dynamically-Loaded Hardware Libraries

Marco Re, Alberto Nannarelli, Andrea Lomuscio, 2016 .

Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories]

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2004, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings..

Fault tolerant design of signed digit based FIR filters

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2006, 2006 IEEE International Symposium on Circuits and Systems.

A Reconfigurable Functional Unit for Modular Operations

Salvatore Pontarelli, Gian Carlo Cardarilli, Luca Di Nunzio, 2013, ApplePies.

System-on-chip oriented fault-tolerant sequential systems implementation methodology

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Multi-Agent Reinforcement Learning: A Review of Challenges and Applications

Gian Carlo Cardarilli, Rocco Fazzolari, Marco Re, 2021, Applied Sciences.

Synaptic behaviour in ZnO–rGO composites thin film memristor

Gian Carlo Cardarilli, Gaurav Mani Khanal, Simone Acciarito, 2017 .

A ZnO-rGO composite thin film discrete memristor

Gaurav Mani Khanal, Simone Acciarito, Rocco Fazzolari, 2016, 2016 IEEE International Conference on Semiconductor Electronics (ICSE).

Multiple Constant Multiplication through Residue Number System

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2009, 2009 Conference Record of the Forty-Third Asilomar Conference on Signals, Systems and Computers.