M. Guillermet

High performance k=2.5 ULK backend solution using an improved TFHM architecture, extendible to the 45nm technology node

V. Arnal, D. Reber, A. Farcy, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Plasma induced damage investigation in the fully depleted SOI technology

G. Ribes, M. Akbal, M. Guillermet, 2015, 2015 International Conference on IC Design & Technology (ICICDT).

Impact of Si/Al implantation on the forming voltage and pre-forming conduction modes in HfO2 based OxRAM cells

Laurent Grenouillet, Elisa Vianello, E. Jalaguier, 2016, 2016 46th European Solid-State Device Research Conference (ESSDERC).

Plasma etch challenges at 14nm and beyond technology nodes in the BEOL

N. Posseme, M. Guillermet, P. Brun, 2015, 2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM).

Dual damascene architectures evaluation for the 0.18 /spl mu/m technology and below

E. Sabouret, M. Guillermet, C. Verove, 2000, Proceedings of the IEEE 2000 International Interconnect Technology Conference (Cat. No.00EX407).

Manufacturability and Speed Performance Demonstration of Porous ULK (k=2.5) for a 45nm CMOS Platform

M. Haond, P. Ferreira, C. Cregut, 2007, 2007 IEEE Symposium on VLSI Technology.

Effect of SET temperature on data retention performances of HfO2-based RRAM cells

C. Muller, S. Jeannot, E. Vianello, 2014, 2014 IEEE 6th International Memory Workshop (IMW).