Jens Peter Wittenburg

An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor

Peter Pirsch, Mladen Berekovic, Johannes Kneip, 1997, J. VLSI Signal Process..

HiPAR-DSP: Ein 1.3 GOPS Multimedia Signalprozessor

Peter Pirsch, Martin Ohmacht, Hanno Lieske, 1999, ARCS.

Ein Beitrag zur Design-Raum-Evaluierung von SMT-Architekturen für objektbasierte Multimedia-Anwendungen

Jens Peter Wittenburg, 2004 .

Processor Architectures for Multimedia Applications

Peter Pirsch, Achim Freimann, Jens Peter Wittenburg, 2002, Embedded Processor Design Challenges.

Architecture Concepts for Multimedia Signal Processing

Peter Pirsch, Hans-Joachim Stolberg, Carsten Reuter, 2001, J. VLSI Signal Process..

IT leverage for media acquisition: New paradigms in the key area of digital cinematography and HD production workflows

Axel Kochale, Jens Peter Wittenburg, Thomas Brune, 2008, 2008 IEEE International Conference on Multimedia and Expo.

HiPAR-DSP 16, a scalable highly parallel DSP core for system on a chip video- and image processing applications

Peter Pirsch, Hanno Lieske, Lars Friebe, 2002, 2002 IEEE International Conference on Acoustics, Speech, and Signal Processing.

Memory device, particularly for non-volatile storage of unkomprmierten video and / or audio data

Axel Kochale, Michael Drexler, Jens Peter Wittenburg, 2005 .

Realization of a programmable parallel DSP for high performance image processing applications

Peter Pirsch, Martin Ohmacht, Mladen Berekovic, 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

A Cost-Efficient RISC Processor Platform for Real Time Audio Applications

Ulrich Schreiber, Tim Niggemeier, Ulrich Gries, 2004, SAMOS.