Valery Sklyarov

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2011, 2011 International Conference on Electronic Devices, Systems and Applications (ICEDSA).

FPGA-based systems in information and communication

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2011, 2011 5th International Conference on Application of Information and Communication Technologies (AICT).

Architecture of a Reconfigurable Processor for Implementing Search Algorithm over Discrete Matrices

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2003, Engineering of Reconfigurable Systems and Algorithms.

Embedded Blocks and System-Level Design

Alexander Barkalov, Larysa Titarenko, Valery Sklyarov, 2014 .

Hardware accelerators for information retrieval and data mining

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2015, 2015 International Conference on Information and Communication Technology Research (ICTRC).

On-Chip Reconfigurable Hardware Accelerators for Popcount Computations

Valery Sklyarov, Iouliia Skliarova, João Paulo Sá da Silva, 2016, Int. J. Reconfigurable Comput..

Design tools and reusable libraries for FPGA-based digital circuits

Manuel Almeida, Valery Sklyarov, Iouliia Skliarova, 2003, Euromicro Symposium on Digital System Design, 2003. Proceedings..

Design of Virtual Digital Controllers Based on FPGAs

Nuno Lau, Valery Sklyarov, Ricardo Sal Monteiro, 1998 .

Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2010, 2010 International Conference on Reconfigurable Computing and FPGAs.

HARDWARE/SOFTWARE MODELING OF FPGA-BASED SYSTEMS

Valery Sklyarov, 2002, Parallel Algorithms Appl..

Hardware implementation of recursive algorithms

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2010, 2010 53rd IEEE International Midwest Symposium on Circuits and Systems.

High-Performance Data Processing Over N -ary Trees

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2013 .

Síntese de Unidades de Controlo Descritas por Grafos dum Esquema Hierárquicos

Valery Sklyarov, António Adrego da Rocha, 1996 .

Comparison of On-chip Communications in Zynq-7000 All Programmable Systems-on-Chip

Valery Sklyarov, Iouliia Skliarova, João Paulo Sá da Silva, 2015, IEEE Embedded Systems Letters.

Data processing in the firmware systems for logic control based on search networks

Valery Sklyarov, Iouliia Skliarova, 2017, Autom. Remote. Control..

Integration of high-level synthesis to the courses on reconfigurable digital systems

Margus Kruus, Valery Sklyarov, Iouliia Skliarova, 2015, 2015 38th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO).

Acceleration of Recursive Data Sorting over Tree-based Structures

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2011 .

Hierarchical finite-state machines and their use for digital control

Valery Sklyarov, 1999, IEEE Trans. Very Large Scale Integr. Syst..

Evolutionary Algorithm for State Encoding

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2006, IFIP AI.

Reconfigurable models of finite state machines and their implementation in FPGAs

Valery Sklyarov, 2002, J. Syst. Archit..

Processing Sorted Subsets in a Multi-level Reconfigurable Computing System

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2015 .

Exploration of high-performance ports in Zynq-7000 devices with different traffic conditions

Valery Sklyarov, Iouliia Skliarova, 2017, 2017 5th International Conference on Electrical Engineering - Boumerdes (ICEE-B).

Teaching FPGA-based systems

Margus Kruus, Valery Sklyarov, Iouliia Skliarova, 2014, 2014 IEEE Global Engineering Education Conference (EDUCON).

Synthesis of parallel hierarchical finite state machines

Valery Sklyarov, Iouliia Skliarova, 2013, 2013 21st Iranian Conference on Electrical Engineering (ICEE).

Processing N-ary trees in hardware circuits

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2011, 2011 International Symposium on Integrated Circuits.

From Procedural to Object-Oriented Programming (foundations, distinctions, applications, training, attractive tutorial)

Valery Sklyarov, 1995 .

Integrated Development Environment for Logic Synthesis Based on Dynamically Reconfigurable FPGAs

Nuno Lau, Arnaldo S. R. Oliveira, Valery Sklyarov, 1998, FPL.

Virtual environment for prototyping and experiments

Valery Sklyarov, Iouliia Skliarova, 2009, 2009 ICCAS-SICE.

Simulation environment for visual prototyping of circuits and systems

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2011, 2011 International Symposium on Integrated Circuits.

Application-specific hardware accelerator for implementing recursive sorting algorithms

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2010, 2010 International Conference on Field-Programmable Technology.

Reconfigurable Systems in Education

Valery Sklyarov, Iouliia Skliarova, 2003, FPL.

RAM-based mergers for data sort and frequent item computation

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2017, 2017 40th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO).

Implementation in FPGA of Address-Based Data Sorting

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2011, 2011 21st International Conference on Field Programmable Logic and Applications.

Solving Computationally Intensive Problems in Reconfigurable Hardware:A Case Study

Margus Kruus, Valery Sklyarov, Iouliia Skliarova, 2013 .

Computação Reconfigurável. WebCT, Tutorials e Projectos

Valery Sklyarov, Iouliia Skliarova, 2003 .

Modeling and implementation of automatic system for garage control

Valery Sklyarov, Iouliia Skliarova, Abilio Neves, 2009, 2009 ICCAS-SICE.

Virtual and Remote Laboratories for Circuit Design e-Learning

Manuel Almeida, Valery Sklyarov, Bruno Pimentel, 2008 .

Hardware Accelerators for Data Sort

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2019, Lecture Notes in Electrical Engineering.

Architectures of FPGA-Based Hardware Accelerators and Design Techniques

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2019, Lecture Notes in Electrical Engineering.

Fast Regular Circuits for Network-based Parallel Data Processing

Valery Sklyarov, Iouliia Skliarova, 2013 .

Design and implementation of counting networks

Valery Sklyarov, Iouliia Skliarova, 2013, Computing.

Multimedia Tools for Teaching Reconfigurable Systems

Valery Sklyarov, Iouliia Skliarova, 2006, MoMM.

Address-based data processing over N-ary trees

Margus Kruus, Valery Sklyarov, Iouliia Skliarova, 2013, Eurocon 2013.

The ARPA Project - Creating an Open-Source Real-Time System-on-Chip

Arnaldo S. R. Oliveira, Valery Sklyarov, António B. Ferrari, 2004 .

Síntese e Implementação de Circuitos Digitais Reconfiguráveis Dinamicamente

Valery Sklyarov, 2003 .

Multimedia Tools and Architectures for Hardware/Software Co-Simulation of Reconfigurable Systems

Manuel Almeida, Valery Sklyarov, Iouliia Skliarova, 2008, 21st International Conference on VLSI Design (VLSID 2008).

Fast Data Sort Based on Searching Networks with Ring Pipeline

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2016 .

An Evolutionary Algorithm for the Synthesis of RAM-Based FSMs

Valery Sklyarov, 2002, IEA/AIE.

Ferramentas para desenvolvimento de sistemas digitais reconfiguráveis

Valery Sklyarov, Iouliia Skliarova, 2003 .

Recursion in reconfigurable computing: A survey of implementation approaches

Valery Sklyarov, Iouliia Skliarova, 2009, 2009 International Conference on Field Programmable Logic and Applications.

FPGA-based time and cost effective Hamming weight comparators for binary vectors

Margus Kruus, Valery Sklyarov, Iouliia Skliarova, 2015, IEEE EUROCON 2015 - International Conference on Computer as a Tool (EUROCON).

Design of FSMs with Embedded Memory Blocks

Alexander Barkalov, Larysa Titarenko, Valery Sklyarov, 2014 .

A interligação do Visual C++ com as FPGAs da XILINX®

Valter Silva, Valery Sklyarov, Frederico Santos, 2000 .

Optimization of recursive sorting algorithms for implementation in hardware

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2010, 2010 International Conference on Microelectronics.

Encoding Algorithms for Logic Synthesis

Valery Sklyarov, Iouliia Skliarova, 2007, 2007 IEEE/ACS International Conference on Computer Systems and Applications.

Design space exploration in multi-level computing systems

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2014, CompSysTech.

Programmable systems-on-chip for information processing

Valery Sklyarov, Iouliia Skliarova, 2014, 2014 IEEE 8th International Conference on Application of Information and Communication Technologies (AICT).

Hardware Reduction in Logic Circuits of Moore FSM

Alexander Barkalov, Larysa Titarenko, Valery Sklyarov, 2014 .

Fast iterative circuits and RAM-based mergers to accelerate data sort in software/hardware systems

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2017 .

Hamming Weight Counters and Comparators based on Embedded DSP Blocks for Implementation in FPGA

Valery Sklyarov, Iouliia Skliarova, 2014 .

Performance evaluation for FPGA-based processing of tree-like structures

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

Network-Based Hardware Accelerators for Parallel Data Processing. Võrgupõhised riistvarakiirendid paralleelseks andmetöötluseks

Valery Sklyarov, Iouliia Skliarova, Aleksander Sudnitsõn, 2017 .

High-performance implementation of regular and easily scalable sorting networks on an FPGA

Valery Sklyarov, Iouliia Skliarova, 2014, Microprocess. Microsystems.

Hardware implementation of hierarchical FSMs

Valery Sklyarov, 2005 .

Reconfigurable Devices and Design Tools

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2019, Lecture Notes in Electrical Engineering.

Modelos, Métodos e Ferramentas para Implementação de Unidades de Controlo Virtuais

Arnaldo S. R. Oliveira, Valery Sklyarov, 2000 .

Multi-core DSP-based Vector Set Bits Counters/Comparators

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2015, J. Signal Process. Syst..

FPGA-Based Implementation of Graph Colouring Algorithms

Valery Sklyarov, Iouliia Skliarova, Bruno Pimentel, 2007 .

Implementation of address-based data sorting on different FPGA platforms

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2013, East-West Design & Test Symposium (EWDTS 2013).

Hardware Accelerators for Data Sort in All Programmable Systems-on-Chip

Valery Sklyarov, Iouliia Skliarova, 2015 .

Reuse Technique in Hardware Design

Valery Sklyarov, Iouliia Skliarova, 2007, 2007 IEEE International Conference on Information Reuse and Integration.

Modeling, Synthesis and Implementation of Communicating Hierarchical FSM

Valery Sklyarov, 2003 .

Hardware implementations of software programs based on hierarchical finite state machine models

Valery Sklyarov, Iouliia Skliarova, 2013, Comput. Electr. Eng..

High-performance hardware accelerators for sorting and managing priorities

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2011, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems.

FPGA-based implementation and comparison of recursive and iterative algorithms

Valery Sklyarov, Iouliia Skliarova, Bruno Figueiredo Pimentel, 2005, International Conference on Field Programmable Logic and Applications, 2005..

Recursion and hierarchy in digital design and prototyping: a case study

Margus Kruus, Valery Sklyarov, Iouliia Skliarova, 2011, CompSysTech '11.

Fast Matrix Covering in All Programmable Systems-on-Chip

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2014 .

Network-based priority buffer

Valery Sklyarov, Iouliia Skliarova, 2017, 2017 5th International Conference on Electrical Engineering - Boumerdes (ICEE-B).

EaSys: Uma Linguagem Orientada por Objectos para Descrição de Sistemas Digitais

Arnaldo S. R. Oliveira, Valery Sklyarov, António B. Ferrari, 2001 .

FPGA-based Accelerators for Parallel Data Sort

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2014, Appl. Comput. Syst..

Teaching reconfigurable systems: methods, tools, tutorials, and projects

Valery Sklyarov, Iouliia Skliarova, 2005, IEEE Transactions on Education.

ARPA - a technology independent and synthetizable system-on-chip model for real-time applications

Arnaldo S. R. Oliveira, Valery Sklyarov, António de Brito Ferrari, 2005, 8th Euromicro Conference on Digital System Design (DSD'05).

Dynamically Reconfigurable Implementation of Control Circuits

Nuno Lau, Valery Sklyarov, 1999, VLSI.

Secure design of communication networks

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2017, 2017 2nd International Conference on Anti-Cyber Crimes (ICACC).

Interactions of Zynq-7000 devices with general purpose computers through PCI-express: A case study

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2016, 2016 18th Mediterranean Electrotechnical Conference (MELECON).

Optimization of address-based data sorting unit with external memory support

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2013, CompSysTech '13.

Development system for FPGA-based digital circuits

Nuno Lau, Arnaldo S. R. Oliveira, Valery Sklyarov, 1999, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00375).

Analysis and Comparison of Attainable Hardware Acceleration in All Programmable Systems-on-Chip

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2015, 2015 Euromicro Conference on Digital System Design.

E-learning Tools and Web-resources for Teaching Reconfigurable Systems

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2006, Education for the 21st Century.

Modeling, design, and implementation of a priority buffer for embedded systems

Valery Sklyarov, Iouliia Skliarova, 2009, 2009 7th Asian Control Conference.

Optimization of FSMs with Embedded Memory Blocks

Alexander Barkalov, Larysa Titarenko, Valery Sklyarov, 2014 .

Design of Digital Circuits on the Basis of Hardware Templates

Valery Sklyarov, Iouliia Skliarova, 2003, Embedded Systems and Applications.

Especificação e Simulação Interactiva de Algoritmos de Controlo Paralelos e Hierárquicos

Valery Sklyarov, António B. Ferrari, Andreia Melo, 2001 .

Simulação em VHDL de Máquinas de Estados Finitas Hierárquicas

Valery Sklyarov, António Adrego da Rocha, 1997 .

Hardware/software co-design in extensible processing platforms for combinatorial search algorithms

Valery Sklyarov, Iouliia Skliarova, Artjom Rjabov, 2014, MELECON 2014 - 2014 17th IEEE Mediterranean Electrotechnical Conference.

FPGA-BASED Hardware Accelerators

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2019, Lecture Notes in Electrical Engineering.

Software/Hardware Solutions for Information Processing in All Programmable Systems-on-Chip

Valery Sklyarov, V. Sklyarov, 2016 .

Reconfigurable systems in engineering education: Best practices and future trends

Margus Kruus, Valery Sklyarov, Iouliia Skliarova, 2017, 2017 IEEE Global Engineering Education Conference (EDUCON).

Synthesis of Reconfigurable Control Devices Based on Object-Oriented Specifications

Valery Sklyarov, António Adrego da Rocha, António Brito de Ferrari, 1998 .

Synthesis of FSMs on the basis of reusable hardware templates

Valery Sklyarov, Iouliia Skliarova, Bruno Pimentel, 2006 .

Especificação, Projecto e Implementação de Circuitos de Controlo Virtuais

Arnaldo S. R. Oliveira, Valery Sklyarov, 1999 .

High-Level Design Tools for FPGA-Based Combinatorial Accelerators

Manuel Almeida, Valery Sklyarov, Iouliia Skliarova, 2003, FPL.

Understanding and Low Level Implementation Basic OOP Constructions

Valery Sklyarov, 1997 .

The Specification and Design of Parallel Logical Control Devices

Valery Sklyarov, Arkadij Zakrevskij, 2000, PDPTA.

Synthesis and Implementation of Parallel Logic Controllers in All Programmable Systems-on-Chip

Valery Sklyarov, Iouliia Skliarova, João Silva, 2016 .

Processing N-ary trees in reconfigurable hardware

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2013, 2013 25th International Conference on Microelectronics (ICM).

Implementation of parallel operations over streams in extensible processing platforms

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS).

FPGA-Based Hardware Accelerators for Selected Computational Problems

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2019, Lecture Notes in Electrical Engineering.

Software/Configware Implementation of Combinatorial Algorithms

Valery Sklyarov, Iouliia Skliarova, 2007, 2007 IEEE/ACS International Conference on Computer Systems and Applications.

A prototyping system for mobile devices

Manuel Almeida, Valery Sklyarov, Iouliia Skliarova, 2007, IWCMC.

Especificação, Optimização e Teste de Algoritmos de Controlo Hierárquicos

Valery Sklyarov, Andreia Melo, 2001 .

Finite State Machines with Operational Implementation of Transitions

Alexander Barkalov, Larysa Titarenko, Valery Sklyarov, 2014 .

E-learning tools and remote reconfigurable systems for engineering education

Valery Sklyarov, Iouliia Skliarova, 2010, 2010 International Conference on Networking and Information Technology.

Circuitos Virtuais Baseados em Reprogramação e Reconfiguração Dinâmica

Nuno Lau, Arnaldo S. R. Oliveira, Valery Sklyarov, 1998 .

Modelação em C++, Síntese e Implementação de Circuitos Digitais com base em FPGA

Valery Sklyarov, 2002 .

A dynamically reconfigurable accelerator for operations over Boolean and ternary vectors

Arnaldo S. R. Oliveira, Valery Sklyarov, Iouliia Skliarova, 2003, Euromicro Symposium on Digital System Design, 2003. Proceedings..

Processing tree-like data structures for sorting and managing priorities

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2011, 2011 IEEE Symposium on Computers & Informatics.

OReK: um executivo de tempo real orientado por objectos

Luis Almeida, Arnaldo S. R. Oliveira, Valery Sklyarov, 2004 .

Reconfigurable Systems and their Influence on Mobile and Multimedia Applications

Valery Sklyarov, Iouliia Skliarova, 2006, MoMM.

Hardware Accelerators for Data Search

Valery Sklyarov, Iouliia Skliarova, I. Skliarova, 2019, Lecture Notes in Electrical Engineering.

Synthesizable VHDL for FPGA-Based Devices

Alexander Barkalov, Larysa Titarenko, Valery Sklyarov, 2014 .

On-chip hardware accelerators for data processing and combinatorial search

Valery Sklyarov, Iouliia Skliarova, 2015, 2015 9th International Conference on Application of Information and Communication Technologies (AICT).

FPGA-based implementation of recursive algorithms

Valery Sklyarov, V. Sklyarov, 2004, Microprocess. Microsystems.

Computing Sorted Subsets for Data Processing in Communicating Software/Hardware Control Systems

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2016, Int. J. Comput. Commun. Control.

Design Technique Based on Hierarchical and Parallel Specifications

Alexander Barkalov, Larysa Titarenko, Valery Sklyarov, 2014 .

Design of automata using programmable logic arrays with memory

Valery Sklyarov, 1984 .

Recursive versus Iterative Algorithms for Solving Combinatorial Search Problems in Hardware

Valery Sklyarov, Iouliia Skliarova, 2008, 21st International Conference on VLSI Design (VLSID 2008).

Specification and synthesis of parallel hierarchical finite state machines for control applications

Valery Sklyarov, Iouliia Skliarova, 2009, 2009 7th Asian Control Conference.

Parallel FPGA-Based Implementation of Recursive Sorting Algorithms

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2010, 2010 International Conference on Reconfigurable Computing and FPGAs.

An Object-Oriented framework for CAN protocol modeling and simulation

Arnaldo S. R. Oliveira, Valery Sklyarov, Pedro Fonseca, 2003 .

Specification, Implementation and Testing of HFSMs in Dynamically Reconfigurable FPGAs

Arnaldo S. R. Oliveira, Valery Sklyarov, Andreia Melo, 1999, FPL.

and Managing Priorities

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2011 .

How to design applications using ObjectWindows

Valery Sklyarov, 1996 .

Using mobile technology to enhance teaching reconfigurable systems

Margus Kruus, Valery Sklyarov, Iouliia Skliarova, 2013, Proceedings of 2013 IEEE International Conference on Teaching, Assessment and Learning for Engineering (TALE).

Synthesis of Reconfigurable Hierarchical Finite State Machines

Valery Sklyarov, Iouliia Skliarova, 2007 .

FPGA-targeted development system for embedded applications

Nuno Lau, Arnaldo S. R. Oliveira, Valery Sklyarov, 1999, FPGA '99.

Multilevel models for data processing

Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, 2011, 2011 IEEE GCC Conference and Exhibition (GCC).

Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers

Joel Arrais, Valery Sklyarov, Iouliia Skliarova, 2004, FPL.

Hierarchical Specification and Design of Control Systems in Robotics

Valery Sklyarov, Iouliia Skliarova, 2006 .

Reconfigurable Hierarchical Finite State Machines

Valery Sklyarov, Iouliia Skliarova, 2006 .

Hierarchical Specification and Implementation of Combinatorial Algorithms Based on RHS Model *

Valery Sklyarov, Iouliia Skliarova, António B. Ferrari, 2001 .

Design Tools for Rapid Prototyping of Embedded Controllers

Valery Sklyarov, Iouliia Skliarova, Bruno Pimentel, 2006 .

DESIGN METHODS FOR FPGA-BASED IMPLEMENTATION OF COMBINATORIAL SEARCH ALGORITHMS

Valery Sklyarov, Iouliia Skliarova, 2006 .