M. Hartranft

A Low cost, microprocessor compatible, 18.4 um/sup 2/,6-t bulk cell technology for high speed SRAMS

M. Helm, W. Kavanaugh, B-K. Liew, 1993, Symposium 1993 on VLSI Technology.

Optimized ESD protection circuits for high-speed MOS/VLSI

M. Hartranft, E. Fujishin, K. Garrett, 1985 .