D. Yagain

High speed digital filter design using register minimization retiming & parallel prefix adders

D. Yagain, A. Vijaya Krishna, 2012, 2012 Third International Conference on Emerging Applications of Information Technology.

FPGA based path solvers for DFGs in high level synthesis

S. Karthikeyan, D. Yagain, A. Adarsh, 2012, 2012 2nd International Conference on Advances in Computational Tools for Engineering Applications (ACTEA).

Design optimization platform for synthesizable high speed digital filters using retiming technique

D. Yagain, A. V. Krishna, S. Chennapnoor, 2012, 2012 10th IEEE International Conference on Semiconductor Electronics (ICSE).