Manan Mewada

A low-power high-speed hybrid full adder

Mazad Zaveri, Manan Mewada, 2016, 2016 20th International Symposium on VLSI Design and Test (VDAT).

Estimating the Maximum Propagation Delay of 4-bit Ripple Carry Adder Using Reduced Input Transitions

Mazad Zaveri, Manan Mewada, Anurag Lakhlani, 2017, VDAT.

Improving the performance of transmission gate and hybrid CMOS Full Adders in chain and tree structure architectures

Rajesh A. Thakker, Mazad Zaveri, Manan Mewada, 2019, Integr..

Transmission Gate and Hybrid Cmos Full Adder Characterization and Power-Delay Product Estimation Based on Mathematical Model

Rajesh A. Thakker, Ratnik Gandhi, Mazad Zaveri, 2020 .

An input test pattern for characterization of a full-adder and n-bit ripple carry adder

Mazad Zaveri, Manan Mewada, 2016, 2016 International Conference on Advances in Computing, Communications and Informatics (ICACCI).