M. Durga Prakash

Validation of Open Core Protocol by Exploiting Design Framework Using System Verilog and UVM

Avinash Yadlapati, Gopika Rani Alekhya Pamarthy, M. Durga Prakash, 2018 .

Device and Circuit Level Design, Characterization and Implementation of Low Power 7T SRAM Cell using Heterojunction Tunneling Transistors with Oxide Overlap

M. Durga Prakash, B.V.V. Satyanarayana, 2020, Microprocess. Microsystems.

FPGA Implementation of Automatic Irrigation and Pesticide Control System

M. Durga Prakash, D. Hanitha, B. Anusha, 2016 .

Implementation of FPGA based MRPMA for high performance applications

M. Sujatha, K Hari Kishore, M. Durga Prakash, 2017 .

I2C protocol and its clock stretching verification using system verilog and UVM

Avinash Yadlapati, M. Durga Prakash, Lakshmi Manasa Kappaganthu, 2017, 2017 International Conference on Inventive Communication and Computational Technologies (ICICCT).

Extensions of open core protocol and their high level verification using system verilog and UVM

Avinash Yadlapati, Gopika Rani Alekhya Pamarthy, M. Durga Prakash, 2017, 2017 International Conference on Inventive Communication and Computational Technologies (ICICCT).