Chul-Hee Jeon

23.4 An extremely low-standby-power 3.733Gb/s/pin 2Gb LPDDR4 SDRAM for wearable devices

Hyun-Soo Park, Hyuk-Jun Kwon, Jong-Ho Lee, 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking

Yong Jae Lee, Hyun-Soo Park, Hyuk-Jun Kwon, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

The impact of NBTI and HCI on deep sub-micron PMOSFETs' lifetime

Chul-Hee Jeon, Chae-Bog Rim, Sam-Young Kim, 2002, IEEE International Integrated Reliability Workshop Final Report, 2002..