Rakesh Kumar Saxena

FPGA Implementation of Fast Redundant Adders Using Universal Logic

Neelam Sharma, Rakesh Kumar Saxena, A. K. Wadwani, 2012 .

Analysis of Transient Response and Load Disturbance Rejection Ability of Induction Motor using Fuzzy Logic Approach

Renu Singh, Rakesh Kumar Saxena, Ravi Sharma, 2014 .

Modified Approach for Harmonic Reduction in Transmission System Using 48-pulse UPFC Employing Series Zig-Zag Primary and Y-Y Secondary Transformer

Rakesh Kumar Saxena, Ragini Malviya, R. Saxena, 2013 .

Performance Analysis of Various Universal Logic Redundant Adders

Neelam Sharma, A. K. Wadhwani, Rakesh Kumar Saxena, 2015 .

Design of Fast Pipelined Multiplier using Modified Redundant Adder

Neelam Sharma, A. K. Wadhwani, Rakesh Kumar Saxena, 2012 .

Brain Tumor Classification Using Back Propagation Neural Network

Rakesh Kumar Saxena, N. Sumitra, N. Sumitra, 2013 .

Fast Adder Design using Redundant Binary Numbers with Reduced Chip Complexity

A. K. Wadhwani, Rakesh Kumar Saxena, A. Wadhwani, 2011 .

Analysis of the Functional Relationship between Electrocardiographic Signal and Simultaneously Acquired Respiratory Signals

Rakesh Kumar Saxena, S. Thakur, 2015 .

Fast Arithmetic Using Signed Digit Numbers and Ternary Logic

Rakesh Kumar Saxena, A. Wadhwani, N. Sharma, 2009 .

Black Hole Detection and Prevention Using Digital Signature and SEP in MANET

Rakesh Kumar Saxena, Sunil R. Gupta, Mohammad Shahid, 2022, 2022 10th International Conference on Emerging Trends in Engineering and Technology - Signal and Information Processing (ICETET-SIP-22).