D. Eckerbert

A power cut-off technique for gate leakage suppression [CMOS logic circuits]

P. Larsson-Edefors, M. Drazdziulis, D. Eckerbert, 2004, Proceedings of the 30th European Solid-State Circuits Conference.

A digitally controlled MEMS gyroscope with 3.2 deg/hr stability

P. Pelin, H. Rodjegard, D. Eckerbert, 2005, The 13th International Conference on Solid-State Sensors, Actuators and Microsystems, 2005. Digest of Technical Papers. TRANSDUCERS '05..

A 3.5GHz 32mW 150nm multiphase clock generator for high-performance microprocessors

A. Alvandpour, S. Borkar, R.K. Krishnamurthy, 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

Dual threshold voltage circuits in the presence of resistive interconnects

P. Larsson-Edefors, L.J. Svensson, D. Eckerbert, 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..

Cycle-true leakage current modeling for CMOS gates

P. Larsson-Edefors, D. Eckerbert, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

A deep submicron power estimation methodology adaptable to variations between power characterization and estimation

P. Larsson-Edefors, D. Eckerbert, D. Eckerbert, 2003, Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003..