Sheng Chou

Structure-aware placement for datapath-intensive circuit designs

Yao-Wen Chang, Meng-Kai Hsu, Sheng Chou, 2012, DAC Design Automation Conference 2012.

NTUplace4h: A Novel Routability-Driven Placement Algorithm for Hierarchical Mixed-Size Circuit Designs

Yao-Wen Chang, Yi-Fang Chen, Tung-Chieh Chen, 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Routability-driven analytical placement for mixed-size circuit designs

Yao-Wen Chang, Meng-Kai Hsu, Tzu-Hen Lin, 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

An Effective and Efficient Framework for Clock Latency Range Aware Clock Network Synthesis

Tsung-Yi Ho, Po-Kai Huang, Sheng Chou, 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

OAL: An obstacle-aware legalization in standard cell placement with displacement minimization

Tsung-Yi Ho, Sheng Chou, 2009, 2009 IEEE International SOC Conference (SOCC).